參數(shù)資料
型號: Q67100-Q2781
廠商: INFINEON TECHNOLOGIES AG
英文描述: BAG 6X10 SHIELDED ZIP LOCK
中文描述: 64兆位同步DRAM
文件頁數(shù): 53/53頁
文件大?。?/td> 418K
代理商: Q67100-Q2781
HYB39S64400/800/160BT(L)
64MBit Synchronous DRAM
Semiconductor Group
52
22. Precharge termination of a Burst
22.1 CAS Latency = 2
Command
Bank A
Activate
T14
BS
Write Data is masked.
of a Write Burst.
Precharge Termination
Addr.
DQ
DQM
AP
Command
Bank A
Activate
Hi Z
Bank A
Write
Command
DAx0
DAx1
RAx
RAx
CAx
Command
Bank A
Command
Bank A
Precharge
DAx3
DAx2
Activate
RAy
RP
t
RAy
Ay0
Command
Bank A
Read
Bank A
Precharge
Command
Ay1 Ay2
CAy
RP
t
T3
CS
WE
CAS
RAS
CKE
CLK
T0
High
CK2
t
T1
T2
T4
T5
T7
T6
T8
T10
T9
T11
T13
T12
Precharge Termination
of a Read Burst.
SPT03933
Bank A
Command
Precharge
Command
Bank A
Read
Az0
Az1
RAz
CAz
RAz
Az2
RP
t
Burst Length = 8 or Full Page, CAS Latency = 2
T20
T17
T15
T16
T18
T19
T21 T22
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