參數(shù)資料
型號(hào): Q67127-C1031
廠商: SIEMENS AG
元件分類: 8位微控制器
英文描述: 8-Bit CMOS Microcontroller
中文描述: 8位CMOS微控制器
文件頁數(shù): 19/48頁
文件大?。?/td> 319K
代理商: Q67127-C1031
Semiconductor Group
19
1997-04-01
C501
Timer / Counter 0 and 1
Timer/counter 0 and 1 can be used in four operating modes as listed in
table 4
.
In the “timer” function (C/T = ‘0’) the register is incremented every machine cycle. Therefore the
count rate is
f
OSC
/12.
In the “counter” function the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a
falling edge the max. count rate is
f
OSC
/24. External inputs INTO and INT1 (P3.2, P3.3) can be
programmed to function as a gate to facilitate pulse width measurements.
Figure 8
illustrates the
input clock logic.
Figure 8
Timer/Counter 0 and 1 Input Clock Logic
Table 4
Timer/Counter 0 and 1 Operating Modes
Mode
Description
TMOD
Input Clock
Gate
C/T
M1
M0
internal
f
OSC
/
12
×
32
external (max)
f
OSC
/
24
×
32
0
8-bit timer/counter with a
divide-by-32 prescaler
X
X
0
0
1
16-bit timer/counter
X
X
1
1
f
OSC
/
12
f
OSC
/
12
f
OSC
/
24
f
OSC
/
24
2
8-bit timer/counter with
8-bit autoreload
X
X
0
0
3
Timer/counter 0 used as one
8-bit timer/counter and one
8-bit timer
Timer 1 stops
X
X
1
1
f
OSC
/
12
f
OSC
/
24
12
f
OSC
/12
MCS01768
OSC
f
C/T
TMOD
0
Control
Timer 0/1
Input Clock
TCON
TR 0/1
Gate
TMOD
&
=1
1
P3.4/T0
P3.5/T1
max
P3.2/INT0
P3.3/INT1
OSC
/24
f
1
÷
_
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