C501
Semiconductor Group
4
1997-04-01
The C501-1R contains a non-volatile 8K
write data memory, four ports, three 16-bit timers counters, a seven source, two priority level
interrupt structure and a serial port. The C501-L is identical, except that it lacks the program
memory on chip. The C501-1E contains a one-time programmable (OTP) program memory on chip.
The term C501 refers to all versions within this specification unless otherwise noted. Further, the
term C501 refers to all versions which are available in the different temperature ranges, marked with
SAB-C501... or SAF-C501....
.
×
8 read-only program memory, a volatile 256
×
8 read/
Ordering Information
Type
Ordering Code Package
Description
(8-Bit CMOS microcontroller)
for external memory (12 MHz)
SAB-C501G-LN
SAB-C501G-LP
SAB-C501G-LM
SAB-C501G-L24N
SAB-C501G-L24P
SAB-C501G-L24M
SAB-C501G-L40N
SAB-C501G-L40P
SAB-C501G-L40M
SAF-C501G-L24N
SAF-C501G-L24P
SAB-C501G-1RN
SAB-C501G-1RP
SAB-C501G-1RM
SAB-C501G-1R24N
SAB-C501G-1R24P
SAB-C501G-1R24M
SAB-C501G-1R40N
SAB-C501G-1R40P
SAB-C501G-1R40M
SAF-C501G-1R24N
SAF-C501G-1R24P
SAB-C501G-1EN
SAB-C501G-1EP
SAF-C501G-1EN
SAF-C501G-1EP
SAB-C501G-1E24N
SAB-C501G-1E24P
SAF-C501G-1E24N
SAF-C501G-1E24P
Q67120-C969
Q67120-C968
Q67127-C970
Q67120-C1001
Q67120-C999
Q67127-C1014
Q67120-C1002
Q67120-C1000
Q67127-C1009
Q67120-C1011
Q67120-C1010
Q67120-DXXX
Q67120-DXXX
Q67127-DXXX
Q67120-DXXX
Q67120-DXXX
Q67127-DXXX
Q67120-DXXX
Q67120-DXXX
Q67127-DXXX
Q67120-DXXX
Q67120-DXXX
Q67120-C1054
Q67120-C1056
Q67120-C2002
Q67120-C2003
Q67120-C2005
Q67120-C2006
Q67120-C2008
Q67120-C2009
P-LCC-44
P-DIP-40
P-MQFP-44
P-LCC-44
P-DIP-40
P-MQFP-44
P-LCC-44
P-DIP-40
P-MQFP-44
P-LCC-44
P-MQFP-44
P-LCC-44
P-DIP-40
P-MQFP-44
P-LCC-44
P-DIP-40
P-MQFP-44
P-LCC-44
P-DIP-40
P-MQFP-44
P-LCC-44
P-DIP-40
P-LCC-44
P-DIP-40
P-LCC-44
P-DIP-40
P-LCC-44
P-DIP-40
P-LCC-44
P-DIP-40
for external memory (24 MHz)
for external memory (40 MHz)
for external memory (24 MHz)
ext. temp. – 40 C to 85 C
with mask-programmable ROM (12 MHz)
with mask-programmable ROM (24 MHz)
with mask-programmable ROM (40 MHz)
with mask-programmable ROM (24 MHz)
ext. temp. – 40 C to 85 C
with OTP memory (12 MHz)
with OTP memory (12 MHz))
ext. temp. – 40
with OTP memory (24 MHz)
C to 85
C
with OTP memory (24 MHz))
ext. temp. – 40
C to 85
C