參數(shù)資料
型號(hào)： Q67220-H1059
廠商： SIEMENS AG
英文描述： ISDN DC Converter Circuit IDCC
中文描述： 綜合業(yè)務(wù)數(shù)字網(wǎng)DC轉(zhuǎn)換器電路IDCC
文件頁(yè)數(shù)： 7/25頁(yè)
文件大小： 145K
代理商： Q67220-H1059
PEB 2023
PEF 2023
Overview
Semiconductor Group
7
08.97
1.3
Pin No.
Pin Definitions and Functions
Symbol
Input (I)
Output (O)
Function
1
V
REF
I
P
O
Output of the 4V reference voltage.
When the voltage difference between
I
P
and GND
exceeds 100mV, the digital current limiting
becomes active and turns off the external FET for
the rest of this oscillator period.
All analog and digital signals are referred to this pin.
2
I
3
GND
I
4
GA
V
EXT
O
Output of the FET-driver.
Output of the internal supply. Via
V
EXT
the internal
low-voltage-circuits can be supplied from an
external DC-supply in order to reduce chip power
dissipation. In supply voltage range 0 the positive
supply voltage must be connected via a resistor to
this pin.
5
I/O
6
C
SS
I
The capacitor at this pin determines the soft-start
characteristic.
V
S
is the positive input voltage for supply voltage
range 1, 2 and 3. Must be connected to GND via a
resistor when using supply voltage range 0.
7
V
S
I
8
COMP
O
Error amplifier output and
P
ulse
W
idth
M
odulator
(PWM) input for loop stabilization network.
9
V
P
V
N
UV
I
Non-inverting input of the error amplifier.
10
I
Inverting input of the error amplifier.
11
I
Input undervoltage lockout. The input undervoltage
lockout level depends on the used supply voltage
range. Must be connected to pin
V
S
when using
supply voltage range 0.
12
UVx
I
If this pin is connected to UV, then supply range 1 is
selected. If this pin is not connected (floating), then
supply range 2 or supply range 3 can be used. Must
be connected to pin
V
EXT
when using supply voltage
range 0.
13
SYNC
I/O
Input for synchronization of the oscillator to an
external frequency, or output to synchronize
multiple devices.
14
RC
I
The external timing components of the ramp
generator are attached to this pin.
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