參數(shù)資料
型號(hào): QL1P100-8PU86C
廠商: QUICKLOGIC CORP
元件分類: FPGA
英文描述: FPGA, 640 CLBS, 100000 GATES, PBGA86
封裝: 6 X 6 MM, 1.20 MMHEIGHT, 0.50 MM PITCH, TFBGA-86
文件頁數(shù): 33/44頁
文件大小: 1101K
代理商: QL1P100-8PU86C
2010 QuickLogic Corporation
QuickLogic PolarPro Device Data Sheet — 86-Pin TFBGA QL1P100 Rev. G
39
Recommended Unused Pin Terminations for PolarPro Devices
All unused, general purpose I/O pins can be tied to VCCIO, GND, or Hi-Z (high impedance) internally. By
default, QuickLogic QuickWorks software ties unused I/Os to GND.
Terminate the rest of the pins at the board level as recommended in Table 41.
Table 41: Recommended Unused Pin Terminations
Signal Name
Recommended Termination
CLK <x>a
a. x represents A, B, C or D.
Connect to GND or VCCIO(x) if unused.
VLP
Tie VLP to 3.3 V to disable low power mode.
CCMVCC(1:0)
If a CCM is not used, the corresponding CCMVCC may be tied to GND to reduce power
consumption. If a CCM is used, do not try to disable the CCM by tying the CCMVCC to GND.
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