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| 型號(hào)： | QL3040-0PQ208I |
| 廠商： | QUICKLOGIC CORP |
| 元件分類： | FPGA |
| 英文描述： | 40000 usable PLD gate pASIC 3 FPGA combining High performance and high density |
| 中文描述： | FPGA, 1008 CLBS, 40000 GATES, 225 MHz, PQFP208 |
| 封裝： | 28 X 28 MM, 3.35 MM HEIGHT, PLASTIC, MS-029, QFP-208 |
| 文件頁數(shù)： | 23/49頁 |
| 文件大?。?/td> | 885K |
| 代理商： | QL3040-0PQ208I |
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2005 QuickLogic Corporation
www.quicklogic.com
pASIC 3 FPGA Family Data Sheet Rev. D
3
Architecture Overview
The pASIC 3 family of devices have a range of 4,000 to 60,000 usable PLD gates. pASIC 3 FPGAs are
fabricated on a 0.35 m four-layer metal process using QuickLogic’s“ patented ViaLink“ technology to provide
a unique combination of high performance, high density, low cost, and extreme ease-of-use.
The pASIC 3 family of devices contain a range of 96 to 1,584 logic cells (see Table 1). With a range of 74 to
316 I/Os, the pASIC 3 family is available in many device/package combinations (see Table 2).
Software support for the complete pASIC 3 family is available through two basic packages. The turnkey
QuickWorks package provides the most complete FPGA software solution from design entry to logic
synthesis, to place and route, to simulation. The QuickToolsTM for Workstations package provides a solution
for designers who use Cadence, ExemplarTM, Mentor, Synopsys, Synplicity, ViewlogicTM, AldecTM, or
other third-party tools for design entry, synthesis, or simulation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QL3040-0PQ208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:60,000 Usable PLD Gate pASIC3 FPGA Combining High Performance and High Density |
| QL3040-0PQ240C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL3040-0PQ240I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL3040-1PB456C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL3040-1PB456I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA|1008-CELL|CMOS|BGA|456PIN|PLASTIC |
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