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參數(shù)資料
| 型號： | QL4009-3PL68C |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| 中文描述： | 9000可用可編程邏輯門QuickRAM ESP結(jié)合性能，密度和嵌入式內(nèi)存 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 373K |
| 代理商： | QL4009-3PL68C |
QL4009 QuickRAM Data Sheet Rev B
Architecture Overview
The QuickRAM
TM
family of ESPs (Embedded Standard Products) offers FPGA logic in
combination with Dual-Port SRAM modules. The QL4009 is a 9,000 usable PLD gate
member of the QuickRAM family of ESPs. QuickRAM ESPs are fabricated on a 0.35
μ
m
four-layer metal process using QuickLogic's patented ViaLink
TM
technology to provide a
unique combination of high performance, high density, low cost, and extreme ease-of-use.
The QL4009 contains 160 logic cells and 8 Dual Port RAM modules (see
Figure 1
). Each
RAM module has 1,152 RAM bits, for a total of 9,216 bits. RAM Modules are Dual Port
(one read port, one write port) and can be configured into one of four modes: 64 (deep) x18
(wide), 128x9, 256x4, or 512x2 (see
Figure 4
). With a maximum of 82 I/Os, the QL4009
is available in 68-pin PLCC, 84-pin PLCC and 100-pin TQFP packages.
Designers can cascade multiple RAM modules to increase the depth or width allowed in
single modules by connecting corresponding address lines together and dividing the words
between modules (see
Figure 2
). This approach allows up to 512-deep configurations as
large as 16 bits wide in the smallest QuickRAM device and 44 bits wide in the largest device.
Software support for the complete QuickRAM family, including the QL4009, is available
through two basic packages. The turnkey QuickWorks
TM
package provides the most
complete ESP software solution from design entry to logic synthesis, to place and route, to
simulation. The QuickTools
TM
packages provides a solution for designers who use Cadence,
Exemplar, Mentor, Synopsys, Synplicity, Viewlogic, Aldec, or other third-party tools for
design entry, synthesis, or simulation.
The QuickLogic variable grain logic cell features up to 16 simultaneous inputs and 5 outputs
within a cell that can be fragmented into 5 independent cells. Each cell has a fan-in of 29
including register and control lines (see
Figure 3
).
Figure 2: QuickRAM Module Bits
RDATA
WDATA
RADDR
RDATA
WADDR
WDATA
RAM
Module
(1,152 bits)
RAM
Module
(1,152 bits)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QL4009-3PL68I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4009-3PL68M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4009-4PF100C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4009-4PF100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4009-4PF100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
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