參數(shù)資料
型號(hào): QL4016-0PF100M
廠商: QUICKLOGIC CORP
元件分類: FPGA
英文描述: FPGA, 320 CLBS, 61280 GATES, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, MO-136, TQFP-100
文件頁數(shù): 2/45頁
文件大小: 1332K
代理商: QL4016-0PF100M
2007 QuickLogic Corporation
QuickRAM Family Data Sheet Rev. M
10
Power-Up Sequencing
Figure 8: Power-Up Requirements
When powering up a device, the VCC/VCCIO rails must take 400 s or longer to reach the maximum value
(refer to Figure 7).
NOTE: Ramping V
CC/VCCIO to the maximum voltage faster than 400 s can cause the device to behave
improperly.
For users with a limited power budget, keep (VCCIO -VCC)MAX ≤ 500 mV when ramping up the power supply.
Volt
a
ge
V
CCIO
V
CC
(V
CCIO -VCC)MAX
Time
400 us
V
CC
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