參數(shù)資料
型號(hào)： QL4016-4PFN144M
廠商： QUICKLOGIC CORP
元件分類： FPGA
英文描述： FPGA, 320 CLBS, 61280 GATES, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, TQFP-144
文件頁(yè)數(shù)： 23/45頁(yè)
文件大小： 1332K
代理商： QL4016-4PFN144M
2007 QuickLogic Corporation
QuickRAM Family Data Sheet Rev. M
3
Architecture Overview
The QuickRAMTM family of Embedded Standard Products (ESP) offer FPGA logic in combination with Dual-
Port SRAM modules. The QuickRAM family of ESPs have up to 90,000 usable PLD gates. QuickRAM ESPs
are fabricated on a 0.35 m four-layer metal process using QuickLogic's patented ViaLinkTM technology to
provide a unique combination of high performance, high density, low cost, and extreme ease-of-use.
The QuickRAM family contains a range of 160 to 1,584 logic cells and 8 to 22 dual port RAM Modules
(see Figure 1). Each RAM Module has 1,152 RAM bits, for a total ranging from 9,216 to 25,344 bits (see
Table 1). RAM Modules are dual port (one read port, one write port) and can be configured into one of four
modes: 64 (deep) x18 (wide), 128x9, 256x4, or 512x2 (see Figure 2). With a maximum of 308 I/Os, the
QuickRAM family of ESPs are available in many device/package combinations (see Table 2).
Figure 2: QuickRAM Module
Designers can cascade multiple RAM Modules to increase the depth or width allowed in single modules by
connecting corresponding address lines together and dividing the words between modules (see Figure 3). This
approach allows up to 512-deep configurations as large as 16 bits wide in the smallest QuickRAM device and
44 bits wide in the largest device.
Figure 3: QuickRAM Module Bits
WA
WD
WE
WCLK
RE
RCLK
RA
RD
[8:0]
[17:0]
[8:0]
[17:0]
MODE
ASYNCRD
[1:0]
RDATA
WDATA
RADDR
RDATA
WADDR
WDATA
RAM
Module
(1,152 bits)
RAM
Module
(1,152 bits)
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QL4016-4PL84M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
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QL4016-4PLI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
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