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參數(shù)資料
| 型號(hào)： | QL4058-0PQ208I |
| 廠商： | QUICKLOGIC CORP |
| 元件分類： | FPGA |
| 英文描述： | 58000 usable PLD gate quickRAM ESP combining performance，Density and Embedded RAM |
| 中文描述： | FPGA, 1008 CLBS, 131328 GATES, PQFP208 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MO-136, QFP-208 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 298K |
| 代理商： | QL4058-0PQ208I |
50
Preliminary
QL4058 - QuickRAM
TM
6-50
Pin Description
Ordering Information
P
IN
D
ESCRIPTION
Pin
TDI/RSI
Function
Test Data In for JTAG /
RAM init. Serial Data In
Description
Hold HIGH during normal operation. Connects to serial
PROM data in for RAM initialization. Connect to VCC if
unused.
Hold LOW during normal operation. Connects to serial
PROM reset for RAM initialization. Connect to GND if
unused.
Hold HIGH during normal operation. Connect to VCC if
not used for JTAG.
Hold HIGH or LOW during normal operation. Connect to
VCC or ground if not used for JTAG.
Connect to serial PROM clock for RAM initialization. Must
be left unconnected if not used for JTAG or RAM
initialization.
Must be grounded during normal operation.
TRSTB/RRO
Active low Reset for JTAG /
RAM init. reset out
TMS
Test Mode Select for JTAG
TCK
Test Clock for JTAG
TDO/RCO
Test data out for JTAG /
RAM init. clock out
STM
I/ACLK
Special Test Mode
High-drive input and/or
array network driver
High-drive input and/or
global network driver
High-drive input
Input/Output pin
Power supply pin
Input voltage tolerance pin
Can be configured as either or both.
I/GCLK
Can be configured as either or both.
I
I/O
VCC
VCCIO
Use for input signals with high fanout.
Can be configured as an input and/or output.
Connect to 3.3V supply.
Connect to 5.0 volt supply if 5 volt input tolerance is
required, otherwise connect to 3.3V supply.
Connect to ground.
GND
GND/THERM
Ground pin
Ground/Thermal pin
Available on 456-PBGA only. Connect to ground plane on
PCB if heat sinking desired. Otherwise may be left
unconnected.
QL 4058 - 1 PQ208 C
Operating Range
C = Commercial
I = Industrial
M = Military
Package Code
PQ208 = 208-pin PQFP
PQ240 = 240-pin PQFP
PB456 = 456-pin PBGA
QuickLogic
device
QuickRAM device
part number
Speed Grade
0 = quick
1 = fast
2 = faster
3 = faster
*4 = wow
* Contact QuickLogic regarding availability.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| QL4058-0PQ240C | Field Programmable Gate Array (FPGA) |
| QL4058-0PQ240I | 58000 usable PLD gate quickRAM ESP combining performance，Density and Embedded RAM |
| QL4058-1PB456C | Field Programmable Gate Array (FPGA) |
| QL4058-1PB456I | 58000 usable PLD gate quickRAM ESP combining performance，Density and Embedded RAM |
| QL4058-1PB456M | Field Programmable Gate Array (FPGA) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QL4058-0PQ208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-0PQ240C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL4058-0PQ240I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-0PQ240M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-1PB456C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
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