參數(shù)資料
型號: QL4058-1PQ208I
英文描述: Field Programmable Gate Array (FPGA)
中文描述: 現(xiàn)場可編程門陣列(FPGA)
文件頁數(shù): 12/12頁
文件大?。?/td> 298K
代理商: QL4058-1PQ208I
54
Preliminary
QL4058 - QuickRAM
TM
6-54
I/O Cell Input Delays
I/O Cell Output Delays
Notes:
[8]The following loads are used for tPXZ
Symbol
Parameter
Propagation Delays (ns)
Fanout
[5]
2
3
1.6
1.8
3.1
3.1
0.0
0.0
1.0
1.2
0.9
1.1
2.3
2.3
0.0
0.0
1
4
8
10
3.6
3.1
0.0
3.0
2.9
2.3
0.0
tI/O
TISU
TIH
TlOCLK
TlORST
TlESU
TlEH
Input Delay (bidirectional pad)
Input Register Set-Up Time
Input Register Hold Time
Input Register Clock To Q
Input Register Reset Delay
Input Register clock Enable Set-Up Time
Input Register Clock Enable Hold Time
1.3
3.1
0.0
0.7
0.6
2.3
0.0
2.1
3.1
0.0
1.5
1.4
2.3
0.0
3.1
3.1
0.0
2.5
2.4
2.3
0.0
Symbol
Parameter
Propagation Delays (ns)
Output Load Capacitance (pF)
50
75
2.5
3.1
2.6
3.2
1.7
2.2
2.0
2.6
30
2.1
2.2
1.2
1.6
2.0
1.2
100
3.6
3.7
2.8
3.1
150
4.7
4.8
3.9
4.2
TOUTLH
TOUTHL
TPZH
TPZL
TPHZ
TPLZ
Output Delay Low to High
Output Delay High to Low
Output Delay Tri-state to High
Output Delay Tri-state to Low
Output Delay High to Tri-State [8]
Output Delay Low to Tri-State [8]
5 pF
1K
5 pF
1K
tPHZ
tPLZ
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
QL4058-1PQ208M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
QL4058-1PQ240C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
QL4058-1PQ240I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
QL4058-1PQ240M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
QL4058-2PB456C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA|1008-CELL|CMOS|BGA|456PIN|PLASTIC