- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄361291 > QL4058-3PQ208M (Electronic Theatre Controls, Inc.) 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM PDF資料下載
參數(shù)資料
| 型號(hào)： | QL4058-3PQ208M |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| 中文描述： | 58000可用門(mén)QuickRAM ESP PLD的結(jié)合性能，密度和嵌入式內(nèi)存 |
| 文件頁(yè)數(shù)： | 5/23頁(yè) |
| 文件大小： | 271K |
| 代理商： | QL4058-3PQ208M |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)
2002 QuickLogic Corporation
www.quicklogic.com
5
QL4058 QuickRAM Data Sheet Rev H
Electrical Specifications
AC Characteristics at V
CC
= 3.3 V, TA = 25
°
C (K = 1.00)
To calculate delays, multiply the appropriate K factor from
Table 10: Operating Range
by the
following numbers in the tables provided.
Figure 3: QuickRAM Logic Cell
Table 1: Logic Cell
Symbol
Parameter
Propagation Delays (ns)
Fanout (5)
1
2
3
4
5
t
PD
Combinatorial Delay
a
a. These limits are derived from a representative selection of the slowest paths through the
QuickRAM logic cell including typical net delays. Worst case delay values for specific paths should
be determined from timing analysis of your particular design.
1.4
1.7
1.9
2.2
3.2
t
SU
Setup Time
a
1.7
1.7
1.7
1.7
1.7
t
H
Hold Time
0.0
0.0
0.0
0.0
0.0
t
CLK
Clock to Q Delay
0.7
1.0
1.2
1.5
2.5
t
CWHI
Clock High Time
1.2
1.2
1.2
1.2
1.2
t
CWLO
Clock Low Time
1.2
1.2
1.2
1.2
1.2
t
SET
Set Delay
1.0
1.3
1.5
1.8
2.8
t
RESET
Reset Delay
0.8
1.1
1.3
1.6
2.6
t
SW
t
RW
Set Width
1.9
1.9
1.9
1.9
1.9
Reset Width
1.8
1.8
1.8
1.8
1.8
QS
A1
QS
OP
B2
C1
MP
MS
D1
D2
E1
F1
F2
F3
F4
F5
F6
QC
QR
OZ
AZ
QZ
NZ
FZ
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| QL4058-3PQ240M | 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-4PB456M | 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-4PQ208M | 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-4PQ240M | 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4090-3PQ240C | Field Programmable Gate Array (FPGA) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QL4058-3PQ240C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-3PQ240I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-3PQ240M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-4PB456C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM |
| QL4058-4PB456I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。