參數(shù)資料
型號: QS5919T70Q
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
中文描述: PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO28
封裝: QSOP-28
文件頁數(shù): 7/9頁
文件大?。?/td> 129K
代理商: QS5919T70Q
7
INDUSTRIAL TEMPERATURE RANGE
QS5919T
LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
AC TIMING DIAGRAM
NOTES:
1. AC Timing Diagram applies to Q output connected to FEEDBACK and
PE
= GND. For
PE
= V
DD
, the negative edge of FEEDBACK aligns with the
negative edge of SYNC input, and the negative edges of the multiplied and divided outputs align with the negative edge of SYNC.
2. All parameters are measured at 1.5V.
SYNC
FEEDBACK
Q
Q
0
-Q
4
Q/2
2xQ
Q
5
t
SKF
t
SKALL
t
SKR
t
J
t
PD
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