- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄361317 > QS5LV91970J (INTEGRATED DEVICE TECHNOLOGY INC) 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER PDF資料下載
參數(shù)資料
| 型號(hào)： | QS5LV91970J |
| 廠(chǎng)商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 時(shí)鐘及定時(shí) |
| 英文描述： | 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| 中文描述： | 5LV SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大小： | 98K |
| 代理商： | QS5LV91970J |
2
INDUSTRIAL TEMPERATURE RANGE
QS5LV919
3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
PIN CONFIGURATION
20
19
18
15
16
23
22
24
21
17
V
DD
GND
PLL_EN
GND
Q/2
Q
3
LOCK
V
DD
2xQ
Q
1
25
28
27
26
V
DD
Q
2
GND
Q
4
2
3
1
9
10
AV
DD
PE
OE/RST
SYNC
0
FEEDBACK
AGND
5
6
7
4
8
Q
5
11
12
FREQ_SEL
SYNC
1
GND
V
DD
REF_SEL
13
14
Q
0
GND
QSOP
TOP VIEW
PLCC
TOP VIEW
O
V
D
Q
5
G
Q
4
V
D
2
Q/2
GND
Q
3
V
DD
Q
2
GND
LOCK
P
G
Q
1
V
D
Q
0
G
F
FEEDBACK
REF_SEL
SYNC
0
AV
DD
PE
AGND
SYNC
1
28
4
3
2
1
27
26
25
24
23
22
21
20
19
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ABSOLUTE MAX IMUM RATINGS
(1)
Symbol
Rating
V
DD
, AV
DD
Supply Voltage to Ground
DC Input Voltage V
IN
MaximumPower
Dissipation (T
A
= 85°C)
T
STG
Storage Temperature Range
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUMRATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Max.
–0.5 to +7
–0.5 to +5.5
655
770
–65 to +150
Unit
V
V
mW
mW
°C
QSOP
PLCC
CAPACITANCE
(T
A
= 25
°
C, f = 1MHz, V
IN
= 0V)
QSOP
Parameter
Typ.
Max.
C
IN
3
PLCC
Typ.
4
Max.
6
Unit
pF
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| QS5LV91970Q | 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV919 | 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV919100J | 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV919100Q | 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV919133J | 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QS5LV91970Q | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV931 | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV93150Q | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV931-50Q | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5LV93166Q | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。