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參數(shù)資料
| 型號： | R5107N171A-TR-FE |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | HALOGEN FREE AND ROHS COMPLIANT, SSOP-8 |
| 文件頁數(shù)： | 22/40頁 |
| 文件大?。?/td> | 517K |
| 代理商： | R5107N171A-TR-FE |
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R510xx
29
Power on Reset Operation against the input glitch (tPLH1 < tPLH)
VDD
VCD
VRESETB
Complete
Discharge
+VDET
-VDET
+VTCD
-VTCD
tPLH1
0V
tPLH
Incomplete
Discharge
Minimum Operating Voltage
We specified the minimum operating voltage as the minimum input voltage in which the condition of RESETB
pin being 0.1V or lower than 0.1V. (Herein, pull-up resistance is set as 100k
Ω in the case of the Nch open-drain
output type.)
Inhibit (INH) Function
If INH pin is set at "L", the watchdog timer stops monitoring the clock, and the RESETB output will be
dominant by the voltage detector's operation. Therefore, if the supply voltage is set at more than the detector
threshold level, RESETB outputs "H" regardless the clock pulse. INH pin is pulled up with a resistor (Typ.110k
Ω)
internally.
RESETB Output
RESETB pin's output type is selectable either the Nch open-drain output or CMOS output. If the Nch
open-drain type output is selected, the RESETB pin is pulled up with an external resistor to an appropriate
voltage source.
Clock Pulse Input
Built-in watchdog timer is cleared with the SCK clock pulse within the watchdog timeout period.
After the SCK1 clock pulse is input, when the SCK2 pulse is input, the watchdog timer will be cleared. If the
system requires only one clock supervise, SCK1 pin and SCK2 pin must connect each other. In this case, the
watchdog timer is cleared with every other clock pulse. Depending on the timing of these two clock pulses,
SCK1 pulse and SCK2 pulse are recognized at almost the same time by the watchdog timer, during the
watchdog timeout period, after the SCK1 clock pulse, two or more SCK2 clock pulses are desirable to put into.
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