REG101
SBVS026C
10
BASIC OPERATION
The REG101 series of LDO (Low Drop-Out) linear regula-
tors offers a wide selection of fixed output voltage versions
and an adjustable output version. The REG101 belongs to a
family of new generation LDO regulators that utilize a
DMOS pass transistor to achieve ultra-low dropout perfor-
mance and freedom from output capacitor constraints. Ground
pin current remains under 650
μ
A over all line, load, and
temperature conditions. All versions have thermal and over-
current protection, including foldback current limit.
The REG101 does not require an output capacitor for regu-
lator stability and is stable over most output currents and
with almost any value and type of output capacitor up to
10
μ
F or more. For applications where the regulator output
current drops below several milliamps, stability can be
enhanced by: adding a 1k
to 2k
load resistor; using
capacitance values less than 10
μ
F; or keeping the effective
series resistance greater than 0.05
including the capacitor’s
ESR and parasitic resistance in printed circuit board traces,
solder joints, and sockets.
Although an input capacitor is not required, it is good analog
design practice to connect a 0.1
μ
F low ESR capacitor across
FIGURE 1. Fixed Voltage Nominal Circuit for REG101.
REG101
Enable
V
OUT
C
OUT
V
IN
0.1
μ
F
C
0.01
μ
F
Gnd
NR
In
Out
Optional
the input supply voltage. This is recommended to improve
ripple rejection by reducing input voltage ripple.
Figure 1 shows the basic circuit connections for the fixed
voltage models. Figure 2 gives the connections for the
adjustable output version (REG101A) and example resistor
values for some commonly used output voltages. Values for
other voltages can be calculated from the equation shown in
Figure 2.
INTERNAL CURRENT LIMIT
The REG101 internal current limit has a typical value of
170mA. A foldback feature limits the short-circuit current to
a typical short-circuit value of 60mA. This helps to protect
the regulator from damage under all load conditions. A
characteristic of V
OUT
versus I
OUT
is given in Figure 3 and
in the Typical Characteristics section.
FIGURE 2. Adjustable Voltage Circuit for REG101A.
FIGURE 3. Foldback Current Limit of the REG101-3.3 at
25
°
C.
0
40
20
140
160
80
100
120
60
180
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
O
Output Current (mA)
FOLDBACK CURRENT LIMIT
I
CL
I
CL
REG101-3.3
V
OUT
= (1 + R
1
/R
2
)
1.267V
Pin numbers for SOT23 package.
REG101
V
IN
0.1
μ
F
2
1
Gnd
V
OUT
R
1
C
0.01
μ
F
C
OUT
Adj
R
2
I
ADJ
Load
5
4
3
Enable
To reduce current through divider, increase resistor
values (see table at right).
As the impedance of the resistor divider increases,
I
ADJ
(~200nA) may introduce an error.
C
FB
improves noise and transient response.
Optional
V
OUT
(V)
2.5
R
1
(W)
(1)
11.3k
1.13k
15.8k
1.58k
18.7k
1.87k
34.0k
3.40k
R
2
(
)
(1)
11.5k
1.15k
11.5k
1.15k
11.5k
1.15k
11.5k
1.15k
3.0
3.3
5.0
NOTE: (1) Resistors are standard 1% values.
EXAMPLE RESISTOR VALUES