參數(shù)資料
型號: REJ03F0010_M61529FP
廠商: Hitachi,Ltd.
英文描述: LEAD FREE EXT TEMP A6832 PLCC
中文描述: 音頻信號處理器環(huán)繞
文件頁數(shù): 21/24頁
文件大?。?/td> 442K
代理商: REJ03F0010_M61529FP
M61529FP
Rev.1.00, Sep.04.2003, page 21 of 23
System Reset
(a) IC’s condition of power supply turn on
This IC is the system composition which compulsory resetting when power supply turn on.
Time constant of power supply is used, and reset pulse is formed.
When V
CC
exceed 5.5V, reset pulse is transmitted. (Logic circuit ON) [1]
The operation time of reset is released reset pulse [2] from transmitted reset pulse [1].
Trst = [Timing A + about 20us] is time of released reset pulse.
(Timing A is time of V
CC
exceed 5.5V.)
t
V
VCC
VDD(Internal power supply)
VSS(Internal power supply)
<Timing of reset>
Transmitted reset pulse
Released reset pulse
Operation time of reset
5.5V
About 20
μ
s
A
1
2
Released reset pulse
(Normal operation)
Trst
t
V
<REF Voltage>
VCC
Voltage of 1pin
=REF Voltage
about200ms(C=100
μ
F)
1.5V
Operation of Analog circuit
1/2 VCC
B
Trst
The power supply is turned on, and resetting is released after Trst, and the reception of the serial
data becomes possible in Logic block.
However, REF voltage doesn't operate in less than 1.5V in the analog block. Make REF voltage is to
transmit serial data by more than 1.5V.
REF Voltage
Time of REF=1.5V =Timing B
(Timing B is time when analog block operates and to become possible.)
<EX> Capacitor of 1pin =100
μ
F
Becomes REF
1.5V in about 200ms.
(b) IC’s condition of power supply turn off
Internal power supply (V
DD
, V
SS
) decreases to V
CC
together, too.
All the data set up when Logic turned it off become invalid.
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