參數(shù)資料
型號: REJ03F0040_M61528FP
廠商: Hitachi,Ltd.
英文描述: LEAD FREE A6832 PLCC
中文描述: 超臨界型固定式均衡器,汽車音響
文件頁數(shù): 10/31頁
文件大小: 306K
代理商: REJ03F0040_M61528FP
M61528FP
Rev.1.1, Dec.17.2003, page 10 of 30
Quality factor : 0.4 / 0.6 / 0.8 / 1.0 (Gv=+8dB, f0=10KHz setting)
Power on Reset
This IC builds in the power on reset function.
The voltage of VCC (24 pin) less than 5.0V, the serial DATA can not accept.
5.0V
V
(V)
(S)
Reset time
Release of reset.
After reset is canceled, the serial DATA can accept.
Relationship Between Data and Clock
The DATA signals are read at rising edges of the CLOCK.
The LATCH signal “H”
D0
D1
D2
D3
D13
D14
D15
The LATCH condition
“L”
“H”
“L”
“H”
How to transmit DATA.
This IC reads DATA signal at the rising edge of the CLOCK.
When DATA are transmitted, setting up the DATA line is always “L” when the falling edge of the CLOCK.
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