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參數(shù)資料
| 型號(hào)： | RF2506 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | VHF/UHF VCO/HIGH-ISOLATION BUFFER AMPLIFIER |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO8 |
| 封裝： | MSOP-8 |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大?。?/td> | 77K |
| 代理商： | RF2506 |
Preliminary
12-11
RF2506
Rev A1 000908
12
P
Pin
1
Function
VCC1
Description
Power supply connection for the VCO. This pin should be well
bypassed close to the package with a capacitor suitable for the fre-
quency of operation as well as a capacitor to minimize low frequency
noise from the voltage supply. The ground side of the capacitors should
connect immediately to ground plane.
Ground connection for the VCO. Keep traces physically short and con-
nect immediately to ground plane for best performance. In order to min-
imize load pulling, it is recommended that pin 2 has a different return
path to ground than pin 6 (i.e., separate vias to a common ground
plane).
Feedback output to resonant circuit. A Colpitts oscillator is formed by
placing a capacitor from this pin to pin 4 and from this pin to ground. A
DC blocking capacitor, suitable for the frequency of operation, should
be used if the external circuitry has DC present or presents a DC path
to ground. See the application schematic of this data sheet for design
details.
Tank circuit input. A resonant circuit is placed from this pin to ground.
The capacitive side is tapped to the FDBK point and the inductive side
includes a varactor for voltage tuning to provide the VCO function. A
DC blocking capacitor, suitable for the frequency of operation, should
be used if the external circuitry has DC present or presents a DC path
to ground. See the application schematic of this data sheet for design
details.
Interface Schematic
2
GND1
See pin 2.
3
FDBK
See pin 4.
4
VTUNE
5
RF OUT
RF output pin. This is an open-collector output and must be biased
externally. A shunt bias/matching inductor to V
CC
and a series blocking/
matching capacitor are recommended. See Application Example Sche-
matic.
Ground connection for the buffer amplifiers. Keep traces physically
short and connect immediately to ground plane for best performance.
In order to minimize load pulling, it is recommended that pin 2 has a dif-
ferent return path to ground than pin 6 (i.e., separate vias to a common
ground plane).
Power supply connection for the buffer amplifiers. This pin should be
well bypassed close to the package with a capacitor suitable for the fre-
quency of operation. The ground side of the capacitor should connect
immediately to ground plane.
Power Down pin for the VCO and buffer amplifiers. A logic “l(fā)ow” (0.0 to
0.7V) turns the entire device off and supply current drops to less than
1
μ
A. A logic “high” (
≥
3.0V) turns the device on. Note that the voltage
on this pin should never exceed 5.5V
DC
.
6
GND2
7
VCC2
8
PD
VTUNE
To Bias Ckts.
To Buffer Amps
and Bias Ckts.
FDBK
GND1
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