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參數(shù)資料
| 型號： | RF9936 |
| 英文描述： | RF Mixer |
| 中文描述： | RF混頻器 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 243K |
| 代理商： | RF9936 |
8-124
RF9936
Rev A8 000822
8
F
NOT FOR NEWDESIGNS
18
MIX RF IN
Mixer RF Input Pin. This pin is internally DC blocked and matched to
50
.
19
GND7
Same as pin 17.
SeeUpgradedProductRF9986
Pin
1
Function
LNA SEL
Description
Selects which LNA (LNA1 or LNA2) is active. This is a digitally con-
trolled input. A logic "high" (
≥
3.1V.) selects LNA2. A logic "low" (
≤
0.5V.)
selects LNA1.
Interface Schematic
2
VCC1
Supply Voltage for the Mixer and RF Buffer Amplifier. External RF
bypassing is required. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci-
tor should connect immediately to ground plane.
Supply Voltage for the LNAs and associated select logic. External RF
bypassing is required. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci-
tor should connect immediately to ground plane.
Ground connection for LNA2. Keep traces physically short and connect
immediately to ground plane for best performance.
RF Input pin for LNA2. This pin is internally DC blocked and internally
matched for minimum noise figure (NOT for minimum VSWR), given a
50
source impedance.
Same as pin 4.
3
VCC2
4
GND1
5
LNA2 IN
6
7
GND2
GND3
Ground connection for LNA1. Keep traces physically short and connect
immediately to ground plane for best performance.
RF Input pin for LNA1. This pin is internally DC blocked and internally
matched for minimum noise figure (NOT for minimum VSWR), given a
50
source impedance.
Same as pin 7.
8
LNA1 IN
9
10
GND4
VCC3
Supply voltage for both LO buffer amplifiers. External RF bypassing is
required. The trace length between the pin and the bypass capacitor
should be minimized. The ground side of the bypass capacitor should
connect immediately to ground plane.
Enable pin for the LO output buffer amplifier. This is a digitally con-
trolled input. A logic "high" (
≥
3.1V.) turns the buffer amplifier on, and
the current consumption increases by 3mA (with -2dBm LO input). A
logic "low" (
≤
0.5V.) turns the buffer amplifier off.
11
LO BUFF
EN
12
LO IN
Mixer LO Input pin. This pin is internally DC blocked and matched to
50
.
Optional Buffered LO Output. This pin is internally DC blocked and
matched to 50
. The buffer amplifier is switched on or off by the volt-
age level at pin 11.
Ground connection for both LO buffer amplifiers. Keep traces physically
short and connect immediately to ground plane for best performance.
Open-collector IF Output pin. This is a balanced output. The output
impedance is set by an internal 1000
resistor to pin 16. Thus the dif-
ferential IF output impedance is 1000
. The resistor sets the operating
impedance, but an external choke or matching inductor to V
CC
must be
supplied in order to bias this output. This inductor is typically incorpo-
rated in the matching network between the output and IF filter. Because
this pin is biased to V
CC
, a DC blocking capacitor must be used if the IF
filter input has a DC path to ground.
Same as pin 15, except complementary output.
13
LO BUFF
OUT
GND5
14
15
IF+
16
17
IF-
See pin 15.
GND6
Ground connection for the Mixer. Keep traces physically short and con-
10 k
LNA
SEL
150
VCC1
VCC4
BIAS
7.5 k
LO
BUFF
EN
1 k
IF-
IF+
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