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參數(shù)資料
| 型號： | RHRXH162374K-02V |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Rad hard low voltage CMOS 16-bit D-type Flip-Flop with 3.6V tolerant inputs and outputs |
| 中文描述： | 抗輻射硬低電壓CMOS 16位D型觸發(fā)器寬容與3.6V的輸入和輸出拖鞋 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大小： | 490K |
| 代理商： | RHRXH162374K-02V |
July 2007
Rev 4
1/17
17
54VCXH162374
Rad hard low voltage CMOS 16-bit D-type Flip-Flop (3-state)
with 3.6V tolerant inputs and outputs
Features
■
1.65 to 3.6V inputs and outputs
■
High speed:
– t
PD
= 3.4ns (Max) at V
CC
= 3.0 to 3.6V
– t
PD
= 4.8ns (Max) at V
CC
= 2.3 to 2.7V
■
Symmetrical impedance outputs:
– |I
OH
| = I
OL
= 12mA (Min) at V
CC
= 3.0V
– |I
OH
| = I
OL
= 8mA (Min) at V
CC
= 2.3V
■
Power down protection on inputs and outputs
■
26
serie resistors in outputs
■
Operating voltage range:
– V
CC
(Opr) = 1.65V to 3.6V
■
Pin and function compatible with 54 SERIES
H162374
■
Bus hold provided on both sides
■
Cold spare function
■
Latch-up performance exceeds
300mA (JESD 17)
■
ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
■
300KRad Mil1019.6 Condition A, (RHA QML
qualification extension undergone)
■
No SEL, no SEU under 72 Mev/cm2/mg LET
heavy ions irradiation
■
QML qualified product
■
Device fully compliant with
DSCC SMD 5962-05212
Description
The 54VCXH162374 is a low voltage CMOS 16
bit d-type Flip-Flop with 3 state outputs non
inverting fabricated with sub-micron silicon gate
and five-layer metal wiring C
2
MOS technology. It
is ideal for low power and very high speed 1.65 to
3.6V applications; it can be interfaced to 3.6V
signal environment for both inputs and outputs.
These 16 bit D-TYPE flip-flops are controlled by
two clock inputs (nCK) and two output enable
inputs (nOE).
On the positive transition of the (nCK), the nQ
outputs will be set to the logic state that were
setup at the nD inputs.
While the (nOE) input is low, the 8 outputs (nQ)
will be in a normal state (HIGH or LOW logic level)
and while high level the outputs will be in a high
impedance state.
Any output control does not affect the internal
operation of flip flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are OFF.
Flat-48
www.st.com
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