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參數(shù)資料
| 型號： | RN5VT45A-RR |
| 廠商： | Ricoh Co., Ltd. |
| 英文描述： | High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register 14-SOIC -55 to 125 |
| 中文描述： | 低電壓檢測 |
| 文件頁數(shù)： | 7/31頁 |
| 文件大?。?/td> | 324K |
| 代理商： | RN5VT45A-RR |
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R
×
5VT
3
Output Delay Time
t
PLH
is defined as follows:
1. In the case of Nch Open Drain Output:
When the time at which a pulse voltage which increases from 0.7V to +V
DET
+2.0V is applied to V
DD
is Time A,and
the time at which the output voltage reaches 2.5V under the conditions that the output pin (OUT) is pulled up
to 5V by a resistor of 470k
is Time B, the time period from Time A through Time B.
2. In the case of CMOS Output:
When the time at which a pulse voltage which increases from 0.7V to +V
DET
+2.0V is applied to V
DD
is Time A, and
the time at which the output voltage reaches the voltage of (+V
DET
+2.0V)/2 is Time B, the time period from
Time A through Time B.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RN5VT45A-T1 | High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register 14-SOIC -55 to 125 |
| RN5VT45A-T2 | High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register 14-SOIC -55 to 125 |
| RN5VT45A-TL | High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register 14-SOIC -55 to 125 |
| RN5VT45A-TR | High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register 14-SOIC -55 to 125 |
| RN5VT45A-TZ | High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register 14-SOIC -55 to 125 |
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