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參數(shù)資料
| 型號： | romr0008 |
| 廠商： | SIEMENS AG |
| 英文描述： | MultiMediaCard R0008 8 Mbyte ROM(多媒體卡 R0002 8 Mbyte ROM) |
| 中文描述： | 多媒體R0008 8字節(jié)的光盤（多媒體卡R0002 8字節(jié)光盤） |
| 文件頁數(shù)： | 13/41頁 |
| 文件大?。?/td> | 208K |
| 代理商： | ROMR0008 |
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Siemens
Product Manual R0008
Semiconductor Group
14
3.1
The R0008 supports the command classes 0, 1 and 2.The parameter CCC is permanently assigned
to the value 0x007.
READ_BLK_LEN
The data block length can be computed as 2
READ_BLK_LEN
. The block length might therefore be in
the range 1, 2,4...2048 bytes.
READ_BLK_PARTIAL defines whether partial block sizes can be used in block read.
READ_BLK_PARTIAL=0 means that only the READ_BLK_LEN block sizes can be used for block
oriented data transfers.
READ_BLK_PARTIAL=1 means that smaller blocks can be used as well. The minimum block size
will be equal to minimum addressable unit (one byte).
The R0008 supports partial block read. The parameter READ_BLK_PARTIAL is permanently
assigned to the value ‘1’.
READ_BLK_MISALIGN
Defines if the data block to be read by one command can be spread over more than one physical
block of the memory device. The size of the data block is defined in READ_BLK_LEN.
READ_BLK_MISALIGN
=0 signals that crossing physical block boundaries is not allowed.
READ_BLK_MISALIGN
=1 signals that crossing physical block boundaries is allowed.
The R0008 supports read block operations with boundary crossing. The parameter
READ_BLK_MISALIGN is permanently assigned to the value ‘1’.
DSR_IMP
Defines if the configurable driver stage option is integrated on the card or not. If implemented a
driver stage register (DSR) must be implemented also.
READ_BLK_PARTIAL
The R0008 output drivers are not configurable. The parameter DSR_IMP is permanently assigned
to the value ‘0’.
C_SIZE, C_SIZE_MULT
This parameter is used to compute the card capacity. The memory capacity of the card is computed
READ_BLK_LEN
Block length
2
0
= 1 byte
2
1
= 2 byte
Remark
0
1
......
11
12-15
2
11
= 2048 byte
reserved
Table 10: Data block length coding
DSR_IMP
DSR type
0
1
no DSR implemented
DSR implemented
Table 11: DSR implementation
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