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參數(shù)資料
| 型號(hào)： | RT9193-1HGU5 |
| 廠商： | Richtek Technology Corporation |
| 英文描述： | 300mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator |
| 中文描述： | 300mA的，超低噪音，超高速的CMOS LDO穩(wěn)壓器 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 218K |
| 代理商： | RT9193-1HGU5 |
RT9193
8
DS9193-09 March 2007
www.richtek.com
Applications Information
Like any low-dropout regulator, the external capacitors
used with the RT9193 must be carefully selected for
regulator stability and performance. Using a capacitor
whose value is > 1
μ
F
on the RT9193 input and the amount
of capacitance can be increased without limit. The input
capacitor must be located a distance of not more than
0.5 inch from the input pin of the IC and returned to a
clean analog ground. Any good quality ceramic or
tantalum can be used for this capacitor. The capacitor
with larger value and lower ESR (equivalent series
resistance) provides better PSRR and line-transient
response. The output capacitor must meet both
requirements for minimum amount of capacitance and
ESR in all LDOs application. The RT9193 is designed
specifically to work with low ESR ceramic output capacitor
in space-saving and performance consideration. Using
a ceramic capacitor whose value is at least 1
μ
F with ESR
is > 25m
Ω
on the RT9193 output ensures stability. The
RT9193 still works well with output capacitor of other
types due to the wide stable ESR range. Figure 1 shows
the curves of allowable ESR range as a function of load
current for various output capacitor values. Output
capacitor of larger capacitance can reduce noise and
improve load transient response, stability, and PSRR. The
output capacitor should be located not more than 0.5
inch from the V
OUT
pin of the RT9193 and returned to a
clean analog ground.
Figure 1
Bypass Capacitor and Low Noise
Connecting a 22nF between the BP pin and GND pin
significantly reduces noise on the regulator output, it is
critical that the capacitor connection between the BP pin
and GND pin be direct and PCB traces should be as short
as possible. There is a relationship between the bypass
capacitor value and the LDO regulator turn on time. DC
leakage on this pin can affect the LDO regulator output
noise and voltage regulation performance.
Enable Function
The RT9193 features an LDO regulator enable/disable
function. To assure the LDO regulator will switch on, the
EN turn on control level must be greater than 1.2 volts.
The LDO regulator will go into the shutdown mode when
the voltage on the EN pin falls below 0.4 volts. For to
protecting the system, the RT9193 have a quick-discharge
function. If the enable function is not needed in a specific
application, it may be tied to V
IN
to keep the LDO regulator
in a continuously on state.
Thermal Considerations
Thermal protection limits power dissipation in RT9193.
When the operation junction temperature exceeds 165
°
C,
the OTP circuit starts the thermal shutdown function turn
the pass element off. The pass element turn on again
after the junction temperature cools by 30
°
C.
For continue operation, do not exceed absolute maximum
operation junction temperature 125
°
C. The power
dissipation definition in device is :
P
D
= (V
IN
V
OUT
) x I
OUT
+ V
IN
x I
Q
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P
D(MAX)
= ( T
J(MAX)
T
A
) /
θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature 125
°
C, T
A
is the ambient temperature and
the
θ
JA
is the junction to ambient thermal resistance.
Region of Stable C
OUT
ESR vs. Load Current
100.00
0.00
0.01
0.10
1.00
10.00
0
50
100
Load Current (mA)
150
200
250
300
C
O
)
Simulation Verify
Instable
Stable
1
RT9193-15CU5
C
IN
= C
OUT
= 1uF, X7R
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