參數(shù)資料
型號(hào): RTL8139B
廠商: Electronic Theatre Controls, Inc.
英文描述: REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述: 瑞昱單芯片快速以太網(wǎng)控制器電源管理
文件頁(yè)數(shù): 33/62頁(yè)
文件大小: 648K
代理商: RTL8139B
RTL8139C(L)
2002/01/10
Rev.1.4
33
7. EEPROM Contents
(93C46 or 93C56)
The 93C46 is a 1K-bit EEPROM (the 93C56 is a 2K-bit EEPROM). Although it is actually addressed by words, its contents are
listed below by bytes for convenience. After the valid duration of the RSTB pin or auto-load command in 9346CR, the
RTL8139C(L) performs a series of EEPROM read operations from the 93C46 (93C56) address 00H to 31H.
It is suggested to obtain Realtek approval before changing the default settings of the EEPROM.
Bytes
00h
01h
Contents
29h
81h
Description
These 2 bytes contain the ID code word for the RTL8139C(L). The RTL8139C(L) will
load the contents of the EEPROM into the corresponding location if the ID word (8129h)
is correct, otherwise, the Vendor ID and Device ID of the PCI configuration space are
hex 10EC and 8129 respectively.
PCI Vendor ID, PCI configuration space offset 00h-01h.
PCI Device ID, PCI configuration space offset 02h-03h.
PCI Subsystem Vendor ID, PCI configuration space offset 2Ch-2Dh.
PCI Subsystem ID, PCI configuration space offset 2Eh-2Fh.
PCI Minimum Grant Timer, PCI configuration space offset 3Eh.
PCI Maximum Latency Timer, PCI configuration space offset 3Fh.
Bits 7-6 map to bits 7-6 of the Media Status register (MSR); Bits 5, 4, 0 map to bits 13,
12, 8 of the Basic Mode Control register (BMCR); Bits 3-2 are reserved. If the network
speed is set to Auto-Detect mode (i.e. Nway mode), then Bit 1=0 means the local
RTL8139C(L) supports flow control (IEEE 802.3x). In this case, Bit 10=1 in the
Auto-negotiation Advertisement Register (offset 66h-67h). Bit 1=1 means the local
RTL8139C(L) does not support flow control. In this case, Bit 10=0 in Auto-negotiation
Advertisement. This is because there are Nway switch hubs which keep sending flow
control pause packets for no reason, if the link partner supports Nway flow control.
RTL8139C(L) Configuration register 3, operational register offset 59H.
After auto-load command or hardware reset, the RTL8139C(L) loads the Ethernet ID to
IDR0-IDR5 of the RTL8139C(L)'s I/O registers.
RTL8139C(L) Configuration register 0, operational registers offset 51h.
RTL8139C(L) Configuration register 1, operational registers offset 52h.
Reserved. Do not change this field without Realtek approval.
Power Management Capabilities. PCI configuration space address 52h and 53h.
Reserved. Do not change this field without Realtek approval.
Reserved. Do not change this field without Realtek approval.
RTL8139C(L) Configuration register 4, operational registers offset 5Ah.
PHY1_PARM_U Reserved. Do not change this field without Realtek approval.
PHY Parameter 1-U for RTL8139C. Operational registers of the RTL8139C(L) are from
78h to 7Bh.
PHY2_PARM_U Reserved. Do not change this field without Realtek approval.
PHY Parameter 2-U for RTL8139C. Operational register of the RTL8139C(L) is 80h.
02h-03h
04h-05h
06h-07h
08h-09h
0Ah
0Bh
0Ch
VID
DID
SVID
SMID
MNGNT
MXLAT
MSRBMCR
0Dh
0Eh-13h
CONFIG3
Ethernet ID
14h
15h
CONFIG0
CONFIG1
PMC
16h-17h
18h
19h
-
CONFIG4
1Ah-1Dh
1Eh
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