參數(shù)資料
型號(hào): RTL8208
廠商: Electronic Theatre Controls, Inc.
英文描述: REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER
中文描述: 瑞昱單芯片八路10/100 Mbps快速以太網(wǎng)收發(fā)器
文件頁數(shù): 15/40頁
文件大?。?/td> 546K
代理商: RTL8208
RTL8208
2001/01/07
15
Rev.1.923
Status bit will be latched at ‘0’ and will remain so until the bit is read. After the bit is read, it becomes ‘1’ if the Link Pass state
has been entered again.
Jabber Detect
– The RTL8208 will return a ‘1’ on bit 1 if a jabber condition has been detected. After the bit is read, or if the chip
is reset, it reverts to ‘0’. This is for 10Base-T only. Jabber occurs when a predefined excessive long packet is detected for
10Base-T. When the duration of TX_EN exceeds the jabber timer (21ms), the transmit and loopback functions will be disabled
and the COL LED starts blinking. After TX_EN goes low for more than 500 ms, the transmitter will be re-enabled and the COL
LED stops blinking.
Extended Capability
– The RTL8208 supports extended capability registers, and will return a ‘1’ when bit 0 is read. Several
extended registers have been implemented in the RTL8208.
6.3 Register2: PHY Identifier 1 Register
The PHY Identifier Registers #1 and #2 together form a unique identifier for the PHY section of this device. The Identifier
consists of a concatenation of the Organizationally Unique Identifier (OUI), the vendor's model number and the model revision
number. A PHY may return a value of zero in each of the 32 bits of the PHY Identifier if desired. The PHY Identifier is intended
to support network management.
Reg. bit
2.[15:0]
Name
OUI
Description
Composed of the 3
rd
to 18
th
bits of the Organizationally
Unique Identifier (OUI), respectively.
Mode
RO
Default
001C h
6.4 Register3: PHY Identifier 2 Register
Reg. bit
3.[15:10]
3.[9:4]
3.[3:0]
Name
OUI
Model Number
Revision Number
Description
Assigned to the 19
th
through 24
th
bits of the OUI.
Manufacturer's model number 08.
Manufacturer's revision number 03.
Mode
RO
RO
RO
Default
110010
001000
0011
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