參數(shù)資料
型號: S-T111B40MC-OGZTFU
元件分類: 固定正電壓單路輸出LDO穩(wěn)壓器
英文描述: 4 V FIXED POSITIVE LDO REGULATOR, 0.26 V DROPOUT, PDSO5
封裝: HALOGEN FREE AND LEAD FREE, SOT-23, 5 PIN
文件頁數(shù): 4/23頁
文件大?。?/td> 225K
代理商: S-T111B40MC-OGZTFU
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
Rev.3.0_00
Seiko Instruments Inc.
12
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided
resistance of several M
Ω between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 12.
Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state.
In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin.
When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table
5
Logic Type
ON/OFF Pin
Internal Circuits
VOUT Pin Voltage
Current Consumption
A
“L”: Power on
Operating
Set value
ISS1
A
“H”: Power off
Stopped
VSS level
ISS2
B
“L”: Power off
Stopped
VSS level
ISS2
B
“H”: Power on
Operating
Set value
ISS1
VSS
ON/OFF
VIN
Figure
12
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