參數(shù)資料
型號: S10053
廠商: Hamamatsu Photonics
英文描述: Light modulation photo IC
中文描述: 光調(diào)制照片集成電路
文件頁數(shù): 4/4頁
文件大?。?/td> 130K
代理商: S10053
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184, www.hamamatsu.com
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 08152-3750, Fax: (49) 08152-2658
France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesv
gen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions.
Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. 2007 Hamamatsu Photonics K.K.
Light modulation photo IC
S4282-51, S6809, S6846, S6986, S7136/-10, S10053
Cat. No. KPIC1002E06
Jul. 2007 DN
S7136-10
KPICA0034EB
Tolerance unless otherwise noted: ±0.1, ±2
Shaded area indicates burr.
Chip position accuracy
with respect to package
dimensions marked *
X
±
0.2
Y
±
0.2
4.6 ± 0.2
(INCLUDING BURR)
CENTER OF
ACTIVE AREA
INDEX MARK
0
0
4.5 *
1.5 ± 0.4
1.5 ± 0.4
2
5
(
5
1
5
0.7 ± 0.15
1.0
2.0
7.5 ± 0.3
0.7 ± 0.3
0.7 ± 0.3
PHOTOSENSITIVE
SURFACE
5
0
0
3
CATHODE (LED)
Vcc
Vout
GND
0
0
4.1 Max.
(INCLUDING BURR)
5.0 ± 0.3 *
2.8
2.4
2.9
1.3
0.75
0.5
0.05
3.0 *
0.45 ± 0.3
0.45 ± 0.3
1.0 ± 0.4
1.0 ± 0.4
0
0
0
0
4
(
3
3
M
3
4
CENTER OF
ACTIVE AREA
0
0
Vout
(GND)
(GND)
(GND)
GND
CATHODE (LED)
(GND)
(GND) (SHORT LEAD)
(GND)
Vcc
MIRROR AREA RANGE
(GND) terminals should be connected to
GND terminal on board.
Tolerance unless otherwise
noted:
±0.1
Shaded area indicates burr.
Chip position accuracy
with respect to the package
dimensions marked *
X
±
0.2
Y
±
0.2
PHOTOSENSITIVE
SURFACE
S10053
KPICA0076E
B
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