參數(shù)資料
型號(hào): S12ATD10B8CV2D
廠商: Motorola, Inc.
元件分類(lèi): 圓形連接器
英文描述: Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Aluminum Alloy; Series:ACA-B Reverse Bayonet; No. of Contacts:8; Connector Shell Size:20; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle; Gender:Female
中文描述: MC9S12DT128設(shè)備的用戶(hù)手冊(cè)V02.09
文件頁(yè)數(shù): 98/138頁(yè)
文件大?。?/td> 2083K
代理商: S12ATD10B8CV2D
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MC9S12DT128 Device User Guide — V02.09
98
NOTE:
In the following context VDD5 is used for either VDDA, VDDR and VDDX; VSS5
is used for either VSSA, VSSR and VSSX unless otherwise noted.
IDD5 denotes the sum of the currents flowing into the VDDA, VDDX and VDDR
pins.
VDD is used for VDD1, VDD2 and VDDPLL, VSS is used for VSS1, VSS2 and
VSSPLL.
IDD is used for the sum of the currents flowing into VDD1 and VDD2.
A.1.3 Pins
There are four groups of functional pins.
A.1.3.1 5V I/O pins
Those I/O pins have a nominal level of 5V. This class of pins is comprised of all port I/O pins, the analog
inputs,BKGDpinandtheRESETinputs.Theinternalstructureofallthosepinsisidentical,howeversome
of the functionality may be disabled. E.g. for the analog inputs the output drivers, pull-up and pull-down
resistors are disabled permanently.
A.1.3.2 Analog Reference
This class is made up by the two VRH and VRL pins.
A.1.3.3 Oscillator
The pins XFC, EXTAL, XTAL dedicated to the oscillator have a nominal 2.5V level. They are supplied
by VDDPLL.
A.1.3.4 TEST
This pin is used for production testing only.
A.1.3.5 VREGEN
This pin is used to enable the on chip voltage regulator.
A.1.4 Current Injection
Power supply must maintain regulation within operating V
DD5
or V
DD
range during instantaneous and
operating maximum current conditions. If positive injection current (V
in
> V
DD5
) is greater than I
DD5
, the
injectioncurrent may flowoutofVDD5 andcouldresult inexternalpowersupply goingoutofregulation.
Insure external VDD5 load will shunt current greater than maximum injection current. This will be the
greatest risk when the MCU is not consuming power; e.g. if no system clock is present, or if clock rate is
very low which would reduce overall power consumption.
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