參數(shù)資料
型號(hào): S12CRGV4D
廠商: Motorola, Inc.
英文描述: MC9S12DT128 Device User Guide V02.09
中文描述: MC9S12DT128設(shè)備的用戶手冊(cè)V02.09
文件頁數(shù): 58/138頁
文件大?。?/td> 2083K
代理商: S12CRGV4D
MC9S12DT128 Device User Guide — V02.09
58
Figure 2-1 Pin assignments 112 LQFP for MC9S12DT128E, MC9S12DT128,
MC9S12DG128E, MC9S12DG128, MC9S12DJ128E, MC9S12DJ128, and MC9S12DB128
VRH
VDDA
PAD15/AN15/ETRIG1
PAD07/AN07/ETRIG0
PAD14/AN14
PAD06/AN06
PAD13/AN13
PAD05/AN05
PAD12/AN12
PAD04/AN04
PAD11/AN11
PAD03/AN03
PAD10/AN10
PAD02/AN02
PAD09/AN09
PAD01/AN01
PAD08/AN08
PAD00/AN00
VSS2
VDD2
PA7/ADDR15/DATA15
PA6/ADDR14/DATA14
PA5/ADDR13/DATA13
PA4/ADDR12/DATA12
PA3/ADDR11/DATA11
PA2/ADDR10/DATA10
PA1/ADDR9/DATA9
PA0/ADDR8/DATA8
P
P
P
P
P
V
V
P
P
P
P
P
P
P
P
V
P
P
P
P
P
P
P
P
P
P
V
V
SS1/PWM3/KWP3/PP3
SCK1/PWM2/KWP2/PP2
MOSI1/PWM1/KWP1/PP1
MISO1/PWM0/KWP0/PP0
XADDR17/PK3
XADDR16/PK2
XADDR15/PK1
XADDR14/PK0
IOC0/PT0
IOC1/PT1
IOC2/PT2
IOC3/PT3
VDD1
VSS1
IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
XADDR19/PK5
XADDR18/PK4
KWJ1/PJ1
KWJ0/PJ0
MODC/TAGHI/BKGD
ADDR0/DATA0/PB0
ADDR1/DATA1/PB1
ADDR2/DATA2/PB2
ADDR3/DATA3/PB3
ADDR4/DATA4/PB4
A
A
A
K
K
K
K
X
M
M
E
V
V
R
V
X
V
E
X
T
S
S
M
M
L
R
I
X
Signals shown in
Bold
are not available on any of the two 80 pin package options
Signals shown in
Bold-Italics
are not available on the MC9S12DJ128E, MC9S12DJ128, MC9S12DG128E, and MC9S12DG128 80 pin package option
Signals shown in Italicsare not available on the MC9S12DB128 80 pin package option
MC9S12DT128E, MC9S12DT128, MC9S12DG128E,
MC9S12DG128, MC9S12DJ128E, MC9S12DJ128,
MC9S12DB128
112LQFP
1
1
1
1
1
1
1
1
1
1
1
1
1
9
9
9
9
9
9
9
9
9
9
8
8
8
8
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
2
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
5
5
5
5
5
5
5
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
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