MC9S12DT128 Device User Guide — V02.09
22
–
Port K
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
–
Port M[1:0]
PM1:0 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
–
Port P6
PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input.
–
Port S[3:2]
PS3:2 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
–
PAD[15:8] (ATD1 channels)
OutofresettheATD1isdisabledpreventingcurrentflowsinthepins.DonotmodifytheATD1
registers!
Document References
The Device User Guide provides information about the MC9S12DT128 device made up of standard
HCS12 blocks and the HCS12 processor core.
This document is part of the customer documentation. A complete set of device manuals also includes all
theindividualBlockUserGuidesoftheimplementedmodules.Inaefforttoreduceredundancyallmodule
specific information is located only in the respective Block User Guide. If applicable, special
implementation details of the module are given in the block description sections of this document.
See
Table 0-2
for names and versions of the referenced documents throughout the Device User Guide.
Table 0-2 Document References
User Guide
HCS12 CPU Reference Manual
HCS12 Module Mapping Control (MMC) Block Guide
HCS12 Multiplexed External Bus Interface (MEBI) Block Guide
HCS12 Interrupt (INT) Block Guide
HCS12 Background Debug Module (BDM) Block Guide
HCS12 Breakpoint (BKP) Block Guide
Clock and Reset Generator (CRG) Block User Guide
Oscillator (OSC) Block User Guide
Enhanced Capture Timer 16 Bit 8 Channel (ECT_16B8C) Block User Guide
Analog to Digital Converter 10 Bit 8 Channel (ATD_10B8C) Block User Guide
Inter IC Bus (IIC) Block User Guide
Asynchronous Serial Interface (SCI) Block User Guide
Serial Peripheral Interface (SPI) Block User Guide
Pulse Width Modulator 8 Bit 8 Channel (PWM_8B8C) Block User Guide
128K Byte Flash (FTS128K) Block User Guide
2K Byte EEPROM (EETS2K) Block User Guide
Byte Level Data Link Controller -J1850 (BDLC) Block User Guide
Version
V02
V04
V03
V01
V04
V01
V04
V02
V01
V02
V02
V02
V02
V01
V02
V01
V01
Document Order Number
S12CPUV2/D
S12MMCV4/D
S12MEBIV3/D
S12INTV1/D
S12BDMV4/D
S12BKPV1/D
S12CRGV4/D
S12OSCV2/D
S12ECT16B8CV1/D
S12ATD10B8CV2/D
S12IICV2/D
S12SCIV2/D
S12SPIV2/D
S12PWM8B8CV1/D
S12FTS128KV2/D
S12EETS2KV1/D
S12BDLCV1/D