參數(shù)資料
型號： S12DTB128PIMV2D
廠商： Motorola, Inc.
英文描述： MC9S12DT128 Device User Guide V02.09
中文描述： MC9S12DT128設(shè)備的用戶手冊V02.09
文件頁數(shù)： 72/138頁
文件大?。?/td> 2083K
代理商： S12DTB128PIMV2D
MC9S12DT128 Device User Guide — V02.09
72
2.3.51 PS5 / MOSI0 — Port S I/O Pin 5
PS5 is a general purpose input or output pin. It can be configured as master output (during master mode)
or slave input pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0).
2.3.52 PS4 / MISO0 — Port S I/O Pin 4
PS4 is a general purpose input or output pin. It can be configured as master input (during master mode) or
slave output pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0).
2.3.53 PS3 / TXD1 — Port S I/O Pin 3
PS3 is a general purpose input or output pin. It can be configured as the transmit pin TXD of Serial
Communication Interface 1 (SCI1).
2.3.54 PS2 / RXD1 — Port S I/O Pin 2
PS2 is a general purpose input or output pin. It can be configured as the receive pin RXD of Serial
Communication Interface 1 (SCI1).
2.3.55 PS1 / TXD0 — Port S I/O Pin 1
PS1 is a general purpose input or output pin. It can be configured as the transmit pin TXD of Serial
Communication Interface 0 (SCI0).
2.3.56 PS0 / RXD0 — Port S I/O Pin 0
PS0 is a general purpose input or output pin. It can be configured as the receive pin RXD of Serial
Communication Interface 0 (SCI0).
2.3.57 PT[7:0] / IOC[7:0] — Port T I/O Pins [7:0]
PT7-PT0 are general purpose input or output pins. They can be configured as input capture or output
compare pins IOC7-IOC0 of the Enhanced Capture Timer (ECT).
2.4 Power Supply Pins
MC9S12DT128 power and ground pins are described below.
Table 2-2 MC9S12DT128 Power and Ground Connection Summary
Pin Number
Nominal
Voltage
112-pin QFP
VDD1, 2
13, 65
2.5V
Internal power and ground generated by internal regulator
VSS1, 2
14, 66
0V
Mnemonic
Description
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