參數(shù)資料
型號: S12OSCV2
廠商: Motorola, Inc.
英文描述: CABLE, 9305, 4PAIR, PER M; Cores, No. of:8; Conductor make-up:1/22AWG; Area, conductor CSA:0.325mm2; Diameter, External:6.73mm; Material, secondary insulation:PVC; Colour, secondary insulation:Chrome; Alpha type number:5905C RoHS Compliant: Yes
中文描述: MC9S12DT128設(shè)備的用戶手冊V02.09
文件頁數(shù): 99/138頁
文件大?。?/td> 2083K
代理商: S12OSCV2
MC9S12DT128 Device User Guide — V02.09
99
A.1.5 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima
is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the
device.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (e.g., either V
SS5
or V
DD5
).
A.1.6 ESD Protection and Latch-up Immunity
All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model.
Table A-1 Absolute Maximum Ratings
1
NOTES
:
1. Beyond absolute maximum ratings device might be damaged.
2. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply.
The absolute maximum ratings apply when the device is powered from an external source.
3. All digital I/O pins are internally clamped to V
SSX
and V
DDX
, V
SSR
and V
DDR
or V
SSA
and V
DDA
.
4. Those pins are internally clamped to V
SSPLL
and V
DDPLL
.
5. This pin is clamped low to V
SSX
, but not clamped high. This pin must be tied low in applications.
Num
Rating
Symbol
Min
Max
Unit
1
I/O, Regulator and Analog Supply Voltage
V
DD5
-0.3
6.0
V
2
Digital Logic Supply Voltage
2
V
DD
-0.3
3.0
V
3
PLL Supply Voltage
2
V
DDPLL
-0.3
3.0
V
4
Voltage difference VDDX to VDDR and VDDA
VDDX
-0.3
0.3
V
5
Voltage difference VSSX to VSSR and VSSA
VSSX
-0.3
0.3
V
6
Digital I/O Input Voltage
V
IN
-0.3
6.0
V
7
Analog Reference
V
RH,
V
RL
-0.3
6.0
V
8
XFC, EXTAL, XTAL inputs
V
ILV
-0.3
3.0
V
9
TEST input
V
TEST
-0.3
10.0
V
10
Instantaneous Maximum Current
Single pin limit for all digital I/O pins
3
I
D
-25
+25
mA
11
Instantaneous Maximum Current
Single pin limit for XFC, EXTAL, XTAL
4
I
DL
-25
+25
mA
12
Instantaneous Maximum Current
Single pin limit for TEST
5
I
DT
-0.25
0
mA
13
Storage Temperature Range
T
stg
– 65
155
°
C
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