參數(shù)資料
型號(hào)： S1623C-FREQ(T)-OUT24
廠商： PERICOM SEMICONDUCTOR CORP
元件分類： XO, clock
英文描述： CRYSTAL OSCILLATOR, CLOCK, 1.544 MHz - 50 MHz, CMOS/LSTTL OUTPUT
文件頁(yè)數(shù)： 2/2頁(yè)
文件大?。?/td> 118K
代理商： S1623C-FREQ(T)-OUT24
All specifications are subject to change without notice.
SaRonix
Mini Crystal Clock Oscillator
Technical Data
S1623 Series
141 Jefferson Drive Menlo Park, CA 94025 USA 650-470-7700 800-227-8974 Fax 650-462-9894
SaRonix
3.3V, HCMOS, Tri-State, SMD
DS-198
REV 01
Package Details
Test Circuits
Tri-State Logic Table
mA
M
POWER
SUPPLY
V M
VDD
OSCILLATOR
Pad 3
Pad 2
.01 F
OUT
GND
CL = 15pF (Note A)
TRI-STATE INPUT
Recommended Land Pattern
Pad 4
Pad 1
Scale: None ( Dimensions in
)
mm
inches
TEST
POINT
**External high frequency power supply
decoupling required.
Note A: CL includes probe and jig capacitance.
6.0±0.2
.236±.008
3.5±0.2
.138±.008
0.9
.035
3.0
.118
max
1.7
.066
0.1
.004
1.5
.059
#1
#2
#4
#3
Pin Configurations
#1 = OE
#2 = GND
#4 = VDD
#3 = OUTPUT
1.4
.055
1.9
0.07
1.4
0.06
2.5
0.10
4.5
0.18
**
12
43
Marking Format (exact location of items may vary)
Line 1: S = SaRonix
C = Stability Tol. (see Part Numbering Guide)
Y = year: 1 = 2001, 2 = 2002, 3 = 2003 etc.
WW = week
Line 2: Frequency (up to 8 digits including decimal point)
SAA YWW
Frequency
Pin 1
Indicator
Date Code
Output Waveform
Tf
Tr
CMOS
SYMMETRY
LOGIC 0
20% VDD
50% VDD
80% VDD
LOGIC 1
Pad # 1 Input
Logic 1 or NC
Logic 0 or GND
Pad # 3 Output
Oscillation
High Impedance
Required Input Level on pad #1:
Logic 1 = 2.2V min
Logic 0 = 0.8V max
ADVANCE
INFORMATION
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