參數(shù)資料
型號: S1L9226X01-Q0R0
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: RF AMP & SERVO SIGNAL PROCESSOR
中文描述: 射頻放大器
文件頁數(shù): 44/56頁
文件大?。?/td> 454K
代理商: S1L9226X01-Q0R0
S1L9226X
RF AMP & SERVO SIGNAL PROCESSOR
4
PRELIMINARY
FEBIAS OFFSET CONTROL
Febias offset control starts when it receives the febias offset control start command $841X from the micom. Febias
offset control ends when the focus error amp output above 1/2 VCC after the focus output with 1/2 VCC at the
focus error amp final output terminal. The voltage per 1 step of the focus offset control is approximately 17mV. The
5bit resistance DAC changes from 112mV up to - 112mV in 1 step, after which 1/2 step, approximately -8mV offset,
is applied.
The offset dispersion after febias offset control exists between -8mV - +8mV. The time per 1 step is 2.5ms; for 5
bits and total of 32 steps, the maximum required time is 128ms.
Hardware performs the control from minus offset to plus offset. The febias offset re-control is when 4bit DAC is
reset by $878. And Reset can be canceled only when the $87F applied D2 bit is changed from 0
1. The Febias
DAC latch block reset for electrostatics and system operation is reset by Micom DATA and not by RESET terminal,
the system reset.
X1
X2
X4
X8
3K
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-
+
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160K
4K
32K
32
+
-
fcmpo
164K
vb
va
11
FSI
vc
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