參數(shù)資料
型號(hào): S25FL004D0LMFI013
廠商: SPANSION LLC
元件分類: PROM
英文描述: 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
中文描述: 4M X 1 FLASH 3V PROM, PDSO8
封裝: 0.208 INCH, LEAD FREE, SOP-8
文件頁數(shù): 6/36頁
文件大?。?/td> 724K
代理商: S25FL004D0LMFI013
14
S25FL Family (Serial Peripheral Interface) S25FL004D
S25FL004D_00A0 June 28, 2004
Ad va n c e
In f o rm a t i o n
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4) sets the Write Enable Latch (WEL)
bit. The Write Enable Latch (WEL) bit must be set prior to every Page Program
(PP), Erase (SE or BE) and Write Status Register (WRSR) instruction. The Write
Enable (WREN) instruction is entered by driving Chip Select (CS#) Low, sending
the instruction code, and then driving Chip Select (CS#) High.
Figure 4. Write Enable (WREN) Instruction Sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 5) resets the Write Enable Latch
(WEL) bit. The Write Disable (WRDI) instruction is entered by driving Chip Select
(CS#) Low, sending the instruction code, and then driving Chip Select (CS#)
High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Figure 5. Write Disable (WRDI) Instruction Sequence
CS#
SCK
SI
SO
High Impedance
Instruction
01
2 3
4 5 67
0 1 2 34 5 6 7
SCK
SI
SO
High Impedance
Instruction
CS#
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S25FL004K0XMFI010 功能描述:閃存 4-MBIT CMOS 3V FLASH MEMORY 104MHz SPI RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel