參數(shù)資料
型號(hào)： S29CL032J0JFFM020
廠商： SPANSION LLC
元件分類： PROM
英文描述： 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
封裝： 13 X 11 MM, 1 MM PITCH, LEAD FREE, FORTIFIED, BGA-80
文件頁(yè)數(shù)： 32/79頁(yè)
文件大?。?/td> 2994K
代理商： S29CL032J0JFFM020
38
S29CD-J & S29CL-J Flash Family
S29CD-J_CL-J_00_B3 March 30, 2009
Da ta
Sh e e t
8.8.4
Reading Toggle Bits DQ6/DQ2
Whenever the system initially begins reading toggle bit status, it must perform two consecutive reads of DQ7-
DQ0 in a row in order to determine whether a toggle bit is toggling. Typically, the system notes and stores the
value of the toggle bit after the first read. After the second read, the system compares the new value of the
toggle bit with the first. If the toggle bit is not toggling, the device completes the program or erases operation.
The system can read array data on DQ7-DQ0 on the following read cycle.
However, if after the initial two read cycles, the system determines that the toggle bit is still toggling, the
system also notes whether the value of DQ5 is high (see the section on DQ5). If it is, the system then
determines again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as
DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or
erases operation. If it is still toggling, the device had not completed the operation successfully, and the
system writes the reset command to return to reading array data.
The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not
gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles,
determining the status as described in the previous paragraph. Alternatively, the system may choose to
perform other system tasks. In this case, the system must start at the beginning of the algorithm when it
returns to determine the status of the operation. Refer to Figure 8.8 for more on the Toggle Bit Algorithm.
Table 8.8 DQ6 and DQ2 Indications
If device is
and the system reads
then DQ6
and DQ2
programming,
at any address,
toggles,
does not toggle.
actively erasing,
at an address within a sector selected
for erasure,
toggles,
also toggles.
at an address within sectors not
selected for erasure,
toggles,
does not toggle
erase suspended,
at an address within sectors selected
for erasure,
does not
toggle,
toggles.
at an address within sectors not
selected for erasure,
returns array
data,
returns array data. The system can
read from any sector not selected for
erasure.
programming in erase
suspend,
at any address,
toggles,
is not applicable.
相關(guān)PDF資料
PDF描述
S29CL032J0RFAM012 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
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