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參數(shù)資料
| 型號： | S2R72A44F12C4 |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, QFP-48 |
| 文件頁數(shù)： | 30/30頁 |
| 文件大?。?/td> | 529K |
| 代理商： | S2R72A44F12C4 |
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5.
Pin Function and Description
6
Seiko Epson Corporation
S2R72A4xF12C4 Series Data Sheet
(Rev.1.00)
5.
Pin Function and Description
GENERAL (applies to S2R72A44/A43/A42)
Pin No.
Name
I/O
RESET
Description
24
XRESET
IN
Reset signal
REFERENCE (applies to S2R72A44/A43/A42)
Pin No.
Name
I/O
RESET
Description
44
XI
IN
Internal oscillator circuit input (12 MHz)
45
XO
OUT
Internal oscillator circuit output (12 MHz)
47
R1
IN
Reference voltage setting pin (connect 12 k
Ω±1% between VSS pins)
TEST (applies to S2R72A44/A43/A42)
Pin No.
Name
I/O
RESET
Description
1
TSTEN
IN (PD)
Test pin (*1): Not used by user
2
ATPGEN
IN (PD)
Test pin (*1): Not used by user
13
TST0
IN
Test pin (*2): Not used by user
PD: Using pull-down I/O
*1:
Pulled down within LSI, but should preferably be fixed as Low on board.
*2:
Fix as Low or pull down on board.
MODE (applies to S2R72A44/A43/A42)
Pin No.
Name
I/O
RESET
Description
14
MODE0
IN
USB Revision setting (*3)
0: USB 2.0 (High-speed compatible hub) 1: USB 1.1 (Full-speed hub)
22
MODE1
IN
23
MODE2
IN
Down ports’ VBUS setting pin
MODE1: bPwrOn2PwrGood selector setting pin
0: 0 ms, 1: 100 ms
MODE2: Gang/Individual selector pin
0: Gang, 1: Individual
MODE2 MODE1 VBUS Mode
H
Individual Mode
LH
Gang Mode
H/L
L
Non-operation mode
36
MODE3
IN
37
MODE4
IN
Port setting pin
Setting availability
MODE4
MODE3
Ports
A44
A43
A42
0
2 ports
0
1
3 ports
-
1
4 ports
-
1
0
n/a
-
*3:
Operates at full-speed in USB 1.1 mode, even when connected to a USB 2.0 (high-speed) compatible USB
host.
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