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參數(shù)資料
| 型號(hào)： | S5K437CX01 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1/4 Optical Size 640x480 (VGA) 2.8V CMOS Image Sensor |
| 中文描述： | 1 / 4光學(xué)尺寸640 × 480（VGA）的2.8V的CMOS圖像傳感器 |
| 文件頁(yè)數(shù)： | 10/36頁(yè) |
| 文件大?。?/td> | 285K |
| 代理商： | S5K437CX01 |
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1/4 INCH VGA CMOS IMAGE SENSOR
S5K437CX
6
CHIP PAD DESCRIPTION
Pin No
I/O
Name
Function
VDDD (18)
Power
Digital power
For logical circuit ( VDD
±
10% )
VSSD (1)
Power
supply
0V (GND)
For I/O circuit ( VDD
±
10% )
VDDIO (19,28)
Power
I/O power supply
VSSIO (29,38)
Power
0V (GND)
For analog circuit ( VDD
±
10% )
VDDA
(4,15,27,30)
Power
Analog power supply
VSSA
(2,3,16,17,25,26,31
,32)
Power
0V (GND)
MCLK (37)
I
Master clock
Master clock pulse input for all timing generators.
RSTN (34)
I
Reset
Initializing all the device registers. (Active low)
STBYN (33)
I
Standby
Activating power saving mode.
(high = normal operation, low = power saving mode)
DATA0~DATA9
(5~14)
O
Image data output
10-bit image data outputs. When ADC resolution is
reduced, the unused lower bits are set to 0.
DCLK (20)
O
Data clock
Image data output synchronizing pulse output.
HSYNC (21)
O
Horizontal sync clock
Horizontal synchronizing pulse or data valid signal
output.
VSYNC (22)
O
Vertical sync clock
Vertical synchronizing pulse or line valid signal
output.
SCL (36)
I
Serial interface clock
I2C serial interface clock input
SDA (35)
I/O
Serial interface data
I2C serial interface data bus
(external pull-up resistor required)
TEST1 (23)
I
Test input 1
Test input signal. Though it can be opened in
normal operation (internally pulled down), it is
recommended to ground the test pins.
TEST2 (24)
I
Test input 2
Test input signal. Though it can be opened in
normal operation (internally pulled down), it is
recommended to ground the test pins.
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