參數(shù)資料
型號: S5T8808A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: PLL FREQUENCY SHNTHESIZER FOR PAGER
中文描述: 鎖相環(huán)頻率SHNTHESIZER的尋呼機(jī)
文件頁數(shù): 7/12頁
文件大?。?/td> 109K
代理商: S5T8808A
PLL FREQUENCY SHNTHESIZER FOR PAGER
S5T8808A
7
Ex 1) In case of 14-bits program, Fc = 325.300MHz, Multiplier = 4, Fin = 75.975MHz
[Fin Freq. / Ref. Frequ.] = 75.975MHz / 6.25kHz = 12156
According to the above equation, 12156/4(P) = 3039 & left = 0 that means, Swallow CNT value is
0
, Main
CNT value is
3039
.
The PMC bit is Program Control Bit, if [0], the N-Counter will be Enabled.
Table 2. R-Counter Register Program Scheme (17 bits)
Bit
Bit 16 (RD 13) ~ Bit 3 (RD 0)
Bit 2
Bit 1
Bit 0 (LSB)
Name
RefD
FRC
FnFr
PMC
Description
Ref. Program
Data (RD 13 ~ RD 0)
Control Mode
Program mode
control
Function
14 Bit Programmable
Ref. R-Counter
0: No FRC (OSCI/4R)
1: FRC (OSCI/R)
0: Fn, Fr function
1: Fn, Fr Low
0: Rx. N-Counter
1: Ref. R-Counter
Table 3. Control Mode
FRC
FnFr
Fn (Pin 14)
Fr (Pin 15)
0
0
Fn out (Fin / N counter)
Fr out (OSCI / 4 x R)
0
1
LOW
LOW
1
0
Fn out (Fin / N-counter)
Fr out (OSCI / R)
1
1
LOW
LOW
0
0
1
0
1
1
1
1
0
1
1
1
1
1
0
0
0
MSB
LSB
PMC bit
2
13
2
0
2
1
2
0
Main CNT 14 - bits
Swallow CNT 2-bits
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