參數(shù)資料
型號: S6A0071
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 32COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
中文描述: 32COM/60SEG驅(qū)動(dòng)
文件頁數(shù): 16/29頁
文件大?。?/td> 330K
代理商: S6A0071
S6A0071
32COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
16
Table 6. Instruction Table
Instruction
Instruction Code
Description
Execution
RS
R/
W
DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
Instruction Code
time(fsoc=270
)
Clear Display
0
0
0
0
0
0
0
0
0
1
Write "20H" to DDRAM. and set
DDRAM address to "00H" from AC.
1.53ms
Return Home
0
0
0
0
0
0
0
0
1
X
Set DDRAM address to "00H" from
the AC and return cursor to its
original position if shifted.
The contents of DDRAM are not
change.
1.53ms
Entry Mode
Set
0
0
0
0
0
0
0
1
I/D
SH
Assign cursor moving direction and
make shift of entire display possible.
39
μ
s
Display
ON/OFF
Control
0
0
0
0
0
0
1
D
C
B
Set display(D), cursor(C), and
blinking of cursor(B) on/off control
bit.
39
μ
s
Cursor or
Display Shift
0
0
0
0
0
1
S/C
R/L
X
X
Set cursor moving and display shift
control bit, and the direction, without
changing of the AC.
39
μ
s
Function Set
0
0
0
0
1
DL
N
X
X
X
Set interface data length (DL : 4-
bit/8-bit), numbers of display line
(N : 1-line/2-line).
39
μ
s
Set CGRAM
Address
0
0
0
1
AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address
counter.
39
μ
s
Set DDRAM
Address
0
0
1
AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address
counter.
39
μ
s
Read Busy
Flag and
Address
0
1
BF
AC6 AC5 AC4 AC3 AC2 AC1 AC0 Whether during internal operation or
not can be known by reading BF.
The contents of address counter
can also be read.
0
μ
s
Write Data to
RAM
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Write data into internal RAM
(DDRAM/CGRAM).
43
μ
s
Read Data
from RAM
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read data from internal RAM
(DDRAM/CGRAM).
43
μ
s
*"x": don't care
NOTE:
for
When you make an MPU program, checking the Busy Flag (DB7), a time margin of 1/2 f
OSC
is necessary
executing the next instruction by the falling edge of the 'E' signal after the Busy Flag (DB7) goes to "0".
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