參數(shù)資料
型號: S80C52EXXX-12D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC44
文件頁數(shù): 59/91頁
文件大小: 19688K
代理商: S80C52EXXX-12D
404
XMEGA A [MANUAL]
8077I–AVR–11/2012
Figure 33-42.Burst access within a single page
** NOP is only inserted for CAS3
**** The number of NOPs is equal to WRDLY[1:0] + 1 (WRDLY = 0 is shown)
***** The number of NOPs is equal to RPDLY[1:0] (RPDLY = 1 is shown)
* The number of NOPs is equal to ROWCOLDLY[2:0] (ROWCOLDLY = 1 is shown)
*** Clock suspended for 1 cycle when EBI is running at 1x and 1 or 2 cycles when EBI
is running at 2x, to enable sampling of data on the positive edge of the 1x clock.
Bank Adr
Row Adr
Col Adr
Burst access within a single page
0x0
Col Adr
0x400
Col Adr
D[7:0]
Prech
a
rge
All
Ba
n
ks
Active
Re
ad
NO
P
*
N
O
P***
*
Da
ta
sa
m
ple
d
N
O
P**
C
lock
susp
e
nd***
Re
ad
Da
ta
sa
m
ple
d
N
O
P**
C
lock
susp
e
nd***
Re
ad
Da
ta
sa
m
ple
d
N
O
P**
C
lock
susp
e
nd***
CLK
CKE
CAS
RAS
DQM
BA[1:0]
A[11:0]
D
ClkPER2
WE
CS
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