參數(shù)資料
型號(hào)： S80C52EXXX-25:R
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQCC44
文件頁(yè)數(shù)： 6/46頁(yè)
文件大?。?/td> 7004K
138
7593L–AVR–09/12
AT90USB64/128
Note:
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1//COMnC1 is set. See “Phase correct PWM mode” on page 106. for more
details.
Bit 1:0 – WGMn1:0: Waveform Generation mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 15-4 on page 138. Modes of operation supported by the
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes. (See “Modes of operation” on page
Table 15-3.
Compare Output mode, phase correct and phase and frequency correct PWM.
COMnA1/COMnB/
COMnC1
COMnA0/COMnB0/
COMnC0
Description
00
Normal port operation, OCnA/OCnB/OCnC
disconnected.
01
WGM13:0 = 8, 9 10 or 11: Toggle OC1A on
Compare Match, OC1B and OC1C
disconnected (normal port operation). For all
other WGM1 settings, normal port operation,
OC1A/OC1B/OC1C disconnected.
10
Clear OCnA/OCnB/OCnC on compare
match when up-counting. Set
OCnA/OCnB/OCnC on compare match
when counting down.
11
Set OCnA/OCnB/OCnC on compare match
when up-counting. Clear
OCnA/OCnB/OCnC on compare match
when counting down.
Table 15-4.
Waveform Generation mode bit description
Mode
WGMn3
WGMn2
(CTCn)
WGMn1
(PWMn1)
WGMn0
(PWMn0)
Timer/Counter mode of
operation
TOP
Update of
OCRn
x at
TOVn flag
set on
0
Normal
0xFFFF
Immediate
MAX
1
0
1
PWM, phase correct, 8-bit
0x00FF
TOP
BOTTOM
2
0
1
0
PWM, phase correct, 9-bit
0x01FF
TOP
BOTTOM
3
0
1
PWM, phase correct, 10-bit
0x03FF
TOP
BOTTOM
4
0
1
0
CTC
OCRnA
Immediate
MAX
5
0
1
0
1
Fast PWM, 8-bit
0x00FF
TOP
6
0
1
0
Fast PWM, 9-bit
0x01FF
TOP
7
0
1
Fast PWM, 10-bit
0x03FF
TOP
8
100
0
PWM, phase and frequency
Correct
ICRn
BOTTOM
9
100
1
PWM, phase and frequency
Correct
OCRnA
BOTTOM
10
1
0
1
0
PWM, phase correct
ICRn
TOP
BOTTOM
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