- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25642 > S80C52TXXX-30:RD (TEMIC SEMICONDUCTORS) 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | S80C52TXXX-30:RD |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44 |
| 文件頁數(shù)： | 83/257頁 |
| 文件大?。?/td> | 1840K |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁當(dāng)前第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁第245頁第246頁第247頁第248頁第249頁第250頁第251頁第252頁第253頁第254頁第255頁第256頁第257頁
173
ATmega8515(L)
2512K–AVR–01/10
Performing Page Erase by
SPM
To execute Page Erase, set up the address in the Z-pointer, write “X0000011” to
SPMCR and execute SPM within four clock cycles after writing SPMCR. The data in R1
and R0 is ignored. The page address must be written to PCPAGE in the Z-register.
Other bits in the Z-pointer must be written zero during this operation.
Page Erase to the RWW section: The NRWW section can be read during the Page
Erase.
Page Erase to the NRWW section: The CPU is halted during the operation.
Filling the Temporary Buffer
(page loading)
To write an instruction word, set up the address in the Z pointer and data in R1:R0, write
“00000001” to SPMCR and execute SPM within four clock cycles after writing SPMCR.
The content of PCWORD in the Z-register is used to address the data in the temporary
buffer. The temporary buffer will auto-erase after a Page Write operation or by writing
the RWWSRE bit in SPMCR. It is also erased after a System Reset. Note that it is not
possible to write more than one time to each address without erasing the temporary
buffer.
Note:
If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded
will be lost.
Performing a Page Write
To execute Page Write, set up the address in the Z-pointer, write “X0000101” to
SPMCR and execute SPM within four clock cycles after writing SPMCR. The data in R1
and R0 is ignored. The page address must be written to PCPAGE. Other bits in the Z-
pointer must be written zero during this operation.
Page Write to the RWW section: The NRWW section can be read during the Page
Write.
Page Write to the NRWW section: The CPU is halted during the operation.
Using the SPM Interrupt
If the SPM interrupt is enabled, the SPM interrupt will generate a constant interrupt
when the SPMEN bit in SPMCR is cleared. This means that the interrupt can be used
instead of polling the SPMCR Register in software. When using the SPM interrupt, the
Interrupt Vectors should be moved to the BLS section to avoid that an interrupt is
accessing the RWW section when it is blocked for reading. How to move the interrupts
is described in “Interrupts” on page 54.
Consideration While Updating
BLS
Special care must be taken if the user allows the Boot Loader section to be updated by
leaving Boot Lock bit11 unprogrammed. An accidental write to the Boot Loader itself can
corrupt the entire Boot Loader, and further software updates might be impossible. If it is
not necessary to change the Boot Loader software itself, it is recommended to program
the Boot Lock bit11 to protect the Boot Loader software from any internal software
changes.
Prevent Reading the RWW
Section During Self-
Programming
During Self-Programming (either Page Erase or Page Write), the RWW section is
always blocked for reading. The user software itself must prevent that this section is
addressed during the Self-Programming operation. The RWWSB in the SPMCR will be
set as long as the RWW section is busy. During Self-Programming the Interrupt Vector
table should be moved to the BLS as described in “Interrupts” on page 54, or the inter-
rupts must be disabled. Before addressing the RWW section after the programming is
completed, the user software must clear the RWWSB by writing the RWWSRE. See
“Simple Assembly Code Example for a Boot Loader” on page 175 for an example.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MF180C51T-20R | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44 |
| MR80C52TXXX-12/883:D | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| MD80C52XXX-12P883D | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40 |
| MR80C32-12/883:RD | 8-BIT, 12 MHz, MICROCONTROLLER, CQCC44 |
| MD80C52TXXX-30:D | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S80C54 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| S80C54-1 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| S80C54-2 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| S80C54-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| S80C54-24 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。