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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
821
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
PORTA
R
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
W
PORTB
R
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
W
DDRA
R
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
W
DDRB
R
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
W
PORTC
R
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
W
PORTD
R
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
W
DDRC
R
DDRC7
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
W
DDRD
R
DDRD7
DDRD6
DDRD5
DDRD4
DDRD3
DDRD2
DDRD1
DDRD0
W
PORTE
R
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
W
DDRE
R
DDRE7
DDRE6
DDRE5
DDRE4
DDRE3
DDRE2
00
W
Non-PIM
Address
Range
R
Non-PIM Address Range
W
PUCR
R
PUPKE
BKPUE
0
PUPEE
PUPDE
PUPCE
PUPBE
PUPAE
W
RDRIV
R
RDPK
00
RDPE
RDPD
RDPC
RDPB
RDPA
W
Non-PIM
Address
Range
R
Non-PIM Address Range
W
= Unimplemented or Reserved
Figure 22-2. PIM Register Summary (Sheet 1 of 6)