參數(shù)資料
型號(hào): S912XHZ512F1CAL
廠商: Freescale Semiconductor
文件頁數(shù): 932/978頁
文件大?。?/td> 0K
描述: IC MCU 16BIT 512KB FLASH 112LQFP
標(biāo)準(zhǔn)包裝: 300
系列: HCS12X
核心處理器: HCS12X
芯體尺寸: 16-位
速度: 80MHz
連通性: CAN,EBI/EMI,I²C,IrDA,SCI,SPI
外圍設(shè)備: LCD,電機(jī)控制 PWM,POR,PWM,WDT
輸入/輸出數(shù): 85
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 2.35 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x8/10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 112-LQFP
包裝: 托盤
Appendix C PCB Layout Guidelines
MC9S12XHZ512 Data Sheet, Rev. 1.06
938
Freescale Semiconductor
Appendix C
PCB Layout Guidelines
The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the
MCU itself. The following rules must be observed:
Every supply pair must be decoupled by a ceramic/tantalum capacitor connected as near as
possible to the corresponding pins (C1–C9).
Central point of the ground star should be the VSS1 pin.
Use low ohmic low inductance connections between VSS1, VSS2, VSSA, VSSX1,2 and VSSM1,2,3.
VSSPLL must be directly connected to VSS1.
Keep traces of VSSPLL, EXTAL and XTAL as short as possible and occupied board area for C10,
C11, C14 and Q1 as small as possible.
Do not place other signals or supplies underneath area occupied by C10, C11, C14 and Q1 and the
connection area to the MCU.
Central power input should be fed in at the VDDA/VSSA pins.
Table C-1. Recommended Components
Component
Purpose
Type
Value
C1
VDD1 lter cap
ceramic X7R
>=400 nF
C2
VDDA lter cap
X7R/tantalum
>=100 nF
C3
VDDX2 lter cap
X7R/tantalum
>=100 nF
C4
VDDR lter cap
X7R/tantalum
>=100 nF
C5
VDDM3 lter cap
X7R/tantalum
>=100 nF
C6
VDDM2 lter cap
X7R/tantalum
>=100 nF
C7
VDDM1 lter cap
X7R/tantalum
>=100 nF
C8
VDDX1 lter cap
X7R/tantalum
>=100 nF
C9
VDDPLL lter cap
ceramic X7R
100 nF .. 220 nF
C10
OSC load cap
See CRG block description chapter
C11
OSC load cap
C12
PLL loop lter cap
C13
PLL loop lter cap
R1
PLL loop lter res
Q1
Quartz/Resonator
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