參數(shù)資料
型號(hào): SA56004EDP
廠商: NXP Semiconductors N.V.
元件分類: 溫度/濕度傳感器
英文描述: +--1 deg Cel accurate, SMBus-compatible, 8-pin, remote-local digital temperature sensor with overtemperature alarms
封裝: SA56004AD<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 11, 2005,;SA56004AD<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 11, 20
文件頁(yè)數(shù): 23/36頁(yè)
文件大?。?/td> 197K
代理商: SA56004EDP
SA56004X_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 22 May 2008
23 of 36
NXP Semiconductors
SA56004X
Digital temperature sensor with overtemperature alarms
[1]
The switching characteristics of the SA56004X fully meet or exceed all parameters specified in SMBus version 2.0 The following
parameters specify the timing between the SCLK and SDATA signals in the SA56004X. They adhere to, but are not necessarily specified
as the SMBus specifications.
[2]
Delay from SDATA STOP to SDATA START.
[3]
Delay from SDATA START to first SCLK HIGH-to-LOW transition.
[4]
Delay from SCLK HIGH-to-LOW transition to SDATA edges.
[5]
Delay from SDATA edges to SCLK LOW-to-HIGH transition.
[6]
Delay from SCLK LOW-to-HIGH transition to restart SDATA.
[7]
Delay from SCLK HIGH-to-LOW transition to SDATA STOP condition.
[8]
LOW period for reset of SMBus.
Table 19.
V
DD
= 3.0 V to 3.6 V; T
amb
=
40
°
C to +125
°
C; unless otherwise specified.
These specifications are guaranteed by design and not tested in production.
Symbol
Parameter
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
I
OL
LOW-level output current
SMBus interface characteristics
Conditions
SCLK, SDATA; V
DD
= 2.7 V to 5.5 V
SCLK, SDATA; V
DD
= 2.7 V to 5.5 V
ALERT, T_CRIT; V
OL
= 0.4 V
SDATA; V
OL
= 0.6 V
Min
2.2
-
1.0
6.0
-
1.0
-
-
Typ
-
-
-
-
-
-
-
5
Max
-
0.8
-
-
1.0
-
1.0
-
Unit
V
V
mA
mA
μ
A
μ
A
μ
A
pF
I
OH
I
IL
I
IH
C
i
SMBus digital switching characteristics
[1]
f
SCLK
SCLK operating frequency
t
LOW
SCLK LOW time
t
HIGH
SCLK HIGH time
t
BUF
SMBus free time
[2]
t
HD;STA
hold time of START condition
[3]
t
HD;DAT
hold time of data
[4]
t
SU;DAT
set-up time of data in
[5]
t
SU;STA
set-up time of repeat START
condition
[6]
t
SU;STO
set-up time of STOP condition
[7]
t
r
rise time
t
f
fall time
t
of
output fall time
t
to(SMBus)
SMBus time-out time
[8]
LOW-level output current
LOW-level input current
HIGH-level input current
input capacitance
SCLK, SDATA
-
600
600
600
600
0
250
250
-
5000
5000
-
-
300
-
-
400
-
-
-
-
-
-
-
kHz
ns
ns
ns
ns
ns
ns
ns
10 % to 10 %
90 % to 90 %
10 % of SDATA to 90 % of SCLK
90 % to 90 %
90 % of SCLK to 90 % of SDATA
SCLK and SDATA
SCLK and SDATA
C
L
= 400 pF; I
O
= 3 mA
250
-
-
-
25
-
-
-
-
-
-
1
300
250
35
ns
μ
s
ns
ns
ms
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