expandor. The input signal, V
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  • 參數(shù)資料
    型號(hào): SA571N
    廠商: ON Semiconductor
    文件頁(yè)數(shù): 8/11頁(yè)
    文件大?。?/td> 0K
    描述: IC COMPANDOR DUAL GAIN 16-DIP
    產(chǎn)品變化通告: Product Obsolescence 11/Feb/2009
    標(biāo)準(zhǔn)包裝: 25
    類型: 壓縮擴(kuò)展器
    應(yīng)用: 蜂窩式無(wú)線電,播放器
    安裝類型: 通孔
    封裝/外殼: 16-DIP(0.300",7.62mm)
    供應(yīng)商設(shè)備封裝: 16-DIP
    包裝: 管件
    SA571
    http://onsemi.com
    6
    Figure 6 shows how the circuit is hooked up to realize an
    expandor. The input signal, VIN, is applied to the inputs of
    both the rectifier and the
    DG cell. When the input signal
    drops by 6.0 dB, the gain control current will drop by a factor
    of 2, and so the gain will drop 6.0 dB. The output level at
    VOUT will thus drop 12 dB, giving us the desired 2to1
    expansion.
    +
    GAIN
    +
    2R
    3 VIN (avg)
    R
    1 R2 IB
    2
    NOTE:
    IB = 140mA
    *EXTERNAL COMPONENTS
    VIN
    VOUT
    VREF
    DG
    *CIN1
    *CIN2
    *CRECT
    R3
    R4
    R1
    R2
    Figure 6. Basic Expander
    Figure 7 shows the hookup for a compressor. This is
    essentially an expandor placed in the feedback loop of the op
    amp. The
    DG cell is setup to provide AC feedback only, so
    a separate DC feedback loop is provided by the two RDC and
    CDC. The values of RDC will determine the DC bias at the
    output of the op amp. The output will bias to:
    V
    OUT DC +
    1
    )
    R
    DC1 ) RDC2
    R
    4
    V
    REF
    V
    OUT DC +
    1
    )
    R
    DCTOT
    30k
    W
    1.8V
    The output of the expander will bias up to:
    V
    OUT DC +
    1
    )
    R
    3
    R
    4
    V
    REF
    V
    OUT DC +
    1
    ) 20kW
    30k
    W
    1.8V
    + 3.0V
    The output will bias to 3.0 V when the internal resistors are
    used. External resistors may be placed in series with R3,
    (which will affect the gain), or in parallel with R4 to raise the
    DC bias to any desired value.
    NOTE: GAIN
    +
    R
    1 R2 IB
    2R
    3 VINavg
    1
    2
    IB = 140mA
    *EXTERNAL COMPONENTS
    VIN
    CIN
    CF
    R1
    R2
    R3
    VOUT
    DG
    *
    CRECT *
    RDC *
    CDC *
    VREF
    R4
    Figure 7. Basic Compressor
    *
    +
    Circuit Details Rectifier
    Figure 8 shows the concept behind the fullwave
    averaging rectifier. The input current to the summing node
    of the op amp, VIN/R1, is supplied by the output of the op
    amp. If we can mirror the op amp output current into a
    unipolar current, we will have an ideal rectifier. The output
    current is averaged by R5, CR, which set the averaging time
    constant, and then mirrored with a gain of 2 to become IG,
    the gain control current.
    CR
    IG
    R1
    VIN
    V+
    I = VIN / R1
    Figure 8. Rectifier Concept
    R5
    10k
    W
    +
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