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參數(shù)資料
| 型號： | SA5753DK |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Audio processor - filter and control section |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, SOT-266-1, SSOP-20 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 101K |
| 代理商： | SA5753DK |
Philips Semiconductors
Product specification
SA5753
Audio processor – filter and control section
1997 Nov 07
5
AC ELECTRICAL CHARACTERISTICS
(continued)
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
9
-52
TBD
100
0.75
UNIT
MIN
8
MAX
9.6
-45
TX overall gain
TX overall gain
TX BPF dynamic range
PREMP
IN
input impedance
TX
OUT
Slew rate
Output impedance
Output swing (limiting)
3kHz
5.9kHz
dBm0
dBm0
dB
k
V/
μ
s
V
P-P
V
P-P
V/kHz
dBm0
f = 3kHz
C
L
= 15pF
f = 3kHz
40
1.2
Output swing (1% THD)
5k
load (25
°
C)
1.0
Tx DTMF signal with TXLPF and pre-emphasis
Rx DTMF sidetone
0.45
–0.8
5.2
Time delay to mute from RX MUTE or TX MUTE
transition
V
IN
= V
IL
to V
IH
V
IN
= V
IH
to V
IL
0.5
0.5
μ
s
μ
s
Table 1. Gain Control Blocks (Bit 0 is Least Significant Bit)
SYMBOL
Bits
TYPICAL STEP (dB)
TYPICAL GAIN (dB)
MIN
–12.0
–3.75
–24.0
–17.0
–3.5
–30.0
–3.5
+1.9 in A2b
–7.6 in A4
+6.0 in A4
MAX
0
+3.75
0
–2.0
+3.5
0
+3.5
A1
A2a
A2b
A3
A4
A6
A7
4
5
2
4
4
4
4
–0.8
±
0.25
–6, (–12 on first)
–1.0
±
0.5
–2.0
±
0.5
NAMPS
1
VCO
1
For A2a, A4 and A7:
MSB sets the sign of the gain
MSB = 0 for gain
MSB = 1 for attenuation
All bits set to 0 = 0dB gain
All bits set to 1 = maximum gain or attenuation
For all Gain Blocks:
FUNCTIONAL DESCRIPTION
The SA5753 is an audio signal processor designed to meet the
requirements of compact low voltage radio telephone equipment. It
includes transmit and receive bandpass filters for voiceband
(300-3000Hz) with pre-emphasis and de-emphasis respectively, a
transmit peak deviation limiter, voice channel mute switches and a
data path which can be summed into the transmit channel. An I
2
C
interface is provided for software programmability of a DTMF
generator, mute polarity, selection of different power down and
operating modes and control of the gain in both the transmit and
receive channels.
Software programmable gain control allows the device to be
automatically optimized during equipment production and offers
flexibility during normal operation.
Gain Blocks
The programmable gain blocks are shown in Table 1 and Figure 2.
The purpose for each block is as follows:
a. A1 compensates for microphone gain variations in the transmit
path.
b. A2a compensates for transmitter dynamic range variations due to
manufacturing tolerances of the SA5753 and SA5752 compandor
companion device. To meet AMPS requirements, the dynamic
range between the zero crossing signal level of the compandor
and the peak signal allowed by the deviation limiter is adjusted to
12.34dB.
c. A2b allows coarse attenuation to be inserted in the transmit path
to eliminate positive feedback effects in hands-free speaker
applications. First step is 12dB followed by two steps of 6dB.
d. A3 sets the gain between the DATA
IN
pin (Pin 19) and the TX
OUT
pin (Pin 20) and should be adjusted after A2a and A4 have been
previously optimized. The SA5753 will interface directly with the
UMA1000T data processor (which produces a 2Vpk data signal).
For NAMPS applications an additional 10 to 14dB resistive divider
must be added at the DATA
IN
pin (Pin 19) for a 2V data signal.
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