參數(shù)資料
型號(hào)： SA8025ADK
廠商： NXP SEMICONDUCTORS
元件分類： XO, clock
英文描述： Low-voltage 1.8GHz fractional-N synthesizer
中文描述： PLL FREQUENCY SYNTHESIZER, 1800 MHz, PDSO20
文件頁(yè)數(shù)： 12/23頁(yè)
文件大?。?/td> 456K
代理商： SA8025ADK
Philips Semiconductors
Product specification
SA8025A
1.8GHz low-voltage Fractional-N synthesizer
1996 Oct 15
12
Table 1. Function Table
Symbol
Bits
Function
NM1
12
Number of main divider cycles when prescaler modulus = 64
*
Number of main divider cycles when prescaler modulus = 65
*
NM2
8 if PR = “01”
4 if PR = “10”
NM3
4 if PR = “10”
Number of main divider cycles when prescaler modulus = 68
*
NM4
4 if PR = “11” or
“00”
2
Number of main divider cycles when prescaler modulus = 73
*
PR
Prescaler type in use
PR = “01”: modulus 2 prescaler (64/65)
PR = “10”: modulus 3 prescaler (64/65/68)
PR = “11”: modulus 4 prescaler (64/65/68/73)
PR = “00”: modulus 3 prescaler (64/65/73)
Fractional-N increment
Fractional-N modulus selection flag
“1”: modulo 8
“0”: modulo 5
A word format selection flag
“0”: 24 bit A0 format
“1”: 32 bit A1 format
Binary current setting factor for main charge pumps
Binary acceleration factor for proportional charge pump current
Binary acceleration factor for integral charge pump current
Main divider enable flag
Auxiliary divider enable flag
Reference select for main phase detector
Reference select for auxiliary phase detector
Reference divider ratio
Auxiliary divider ratio
Auxiliary prescaler mode:
PA = “0”: divide by 4
PA = “1”: divide by 1
NF
3
1
FMOD
LONG
1
CN
CL
CK
EM
EA
SM
SA
NR
NA
8
2
4
1
1
2
2
12
12
PA
1
*
Not including reset cycles and Fractional-N effects.
Table 2. Prescaler Ratio
The total division ratio from prescaler to the phase detector may be expressed as:
if PR = “01”
N = (NM1 + 2) x 64 + NM2 x 65
N’ = (NM1 + 1) x 64 + (NM2 + 1) x 65 (*)
if PR = “10”
N = (NM1 + 2) x 64 + NM2 x 65 + (NM3 + 1) x 68
N’ = (NM1 + 1) x 64 + (NM2 + 1) x 65 + (NM3 + 1) x 68 (*)
if PR = “11”
N = (NM1 + 2) x 64 + NM2 x 65 + (NM3 + 1) x 68 + (NM4 + 1) x 73
N’ = (NM1 + 1) x 64 + (NM2 + 1) x 65 + (NM3 + 1) x 68 + (NM4 + 1) x 73 (*)
if PR = “00”
N = (NM1 + 2) x 64 + NM2 x 65 + (NM4 + 1) x 73
N’ = (NM1 + 1) x 64 + (NM2 + 1) x 65 + (NM4 + 1) x 73 (*)
(*) When the fractional accumulator overflows the prescaler ratio = 65 (64 + 1) and the total division ratio N’ = N + 1
Table 3. PR Modulus
PR
Modulus Prescaler
Bit Capacity
NM2
8
4
4
8
NM1
12
12
12
12
NM3
–
4
4
–
NM4
–
–
4
4
01
10
11
00
2
3
4
3
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